Margins of junction parameter spread for non-hysteretic Josephson junction arrays

Abstract

The programmable Josephson voltage standard shows robust step stability and is convenient for many metrological applications. The advantages of the programmable Josephson voltage standard are due to the array of non-hysteretic Josephson junctions with very high uniformity. We have numerically investigated the non-hysteretic Josephson junction arrays: externally shunted SIS (superconductor-insulator-superconductor) junctions and SINIS (superconductor-insulator-normal metal-insulator-superconductor) junction array. For the externally shunted SIS junction, we found the existence of an optimal range of the shunt inductance. For the SINIS junction array, the maximum tolerable nonuniformity of the junction parameters and the microwave power could be derived according to a tolerance criterion given in terms of the step width of the first Shapiro step. The simulation was also compared with an experimental observation for 1 V SINIS array with 8192 junctions.

ISEC 2003—reflections on the conference

“…Harris offered an impressive account of continuing development and trends in superconducting voltage standards and included also microcalorimeters for high-resolution x-ray detector arrays [27]. In voltage standards the forefront of development are ac standards such as the Josephson arbitrary waveform synthesizer using stacked SNS junctions [28], which, however, still require much larger scale integration to attain the level of 10 V. Also programmable dc voltage standards are progressing [29,30]. Superconducting electronics contributes also to the development of improved temperature and electron-counting capacitance standards.…”