Mapping multiple applications onto 3D NoC-based MPSoCs supporting wireless links

Kiani, Vahdaneh; Reshadi, Midia

doi:10.1007/s11227-016-1908-3

Cited by 3 publications

(4 citation statements)

References 38 publications

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“…Researchers have provided various platforms for NoC based MPSoC models [39,40]. The use of NoC in multicore models in various application has shown promising results in terms of scalability and efficiency [14,41,42,43,44,45].…”

Section: Experimentation and Resultsmentioning

confidence: 99%

A Parallel Architecture for the Partitioning around Medoids (PAM) Algorithm for Scalable Multi-Core Processor Implementation with Applications in Healthcare

Mushtaq

Khawaja

Akram

et al. 2018

Sensors

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Clustering is the most common method for organizing unlabeled data into its natural groups (called clusters), based on similarity (in some sense or another) among data objects. The Partitioning Around Medoids (PAM) algorithm belongs to the partitioning-based methods of clustering widely used for objects categorization, image analysis, bioinformatics and data compression, but due to its high time complexity, the PAM algorithm cannot be used with large datasets or in any embedded or real-time application. In this work, we propose a simple and scalable parallel architecture for the PAM algorithm to reduce its running time. This architecture can easily be implemented either on a multi-core processor system to deal with big data or on a reconfigurable hardware platform, such as FPGA and MPSoCs, which makes it suitable for real-time clustering applications. Our proposed model partitions data equally among multiple processing cores. Each core executes the same sequence of tasks simultaneously on its respective data subset and shares intermediate results with other cores to produce results. Experiments show that the computational complexity of the PAM algorithm is reduced exponentially as we increase the number of cores working in parallel. It is also observed that the speedup graph of our proposed model becomes more linear with the increase in number of data points and as the clusters become more uniform. The results also demonstrate that the proposed architecture produces the same results as the actual PAM algorithm, but with reduced computational complexity.

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Section: Experimentation and Resultsmentioning

confidence: 99%

A Parallel Architecture for the Partitioning around Medoids (PAM) Algorithm for Scalable Multi-Core Processor Implementation with Applications in Healthcare

Mushtaq

Khawaja

Akram

et al. 2018

Sensors

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“…Kiani et al 19 proposed mapping of multiple applications onto irregular 3D wireless NoC. First, 3D NoC architecture is partitioned into several regions.…”

Section: Related Work and Motivationmentioning

confidence: 99%

“…But with the increasing number of processing elements and their capacities, the multi‐task mapping approaches are required to handle the parallel execution of multiple applications. Also, few works have addressed the problem of mapping multiple applications in 3D NoC by investigating in the NoC architecture's management 17,19 to reduce the interference and the fragmentation between applications. On the other hand, the mapping algorithm targeting a regular 3D NoC should take advantage of the vertical links due to its high communication efficiency.…”

Section: Related Work and Motivationmentioning

confidence: 99%

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A new efficient multi‐task applications mapping for three‐dimensional Network‐on‐Chip based MPSoC

Gaffour

Benhaoua

Benyamina

et al. 2021

Concurrency and Computation

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Summary Three‐dimensional Network‐on‐Chip (3D NoC) is a promising solution for solving 2D NoC problems while optimizing the system's performance. Mapping applications in 3D NoC is a crucial step as it has a significant impact on overall system performance. Moreover, multi‐task supported processing elements (PEs) are needed to run multiple applications and provide more scalability. Most of the existing 3D mapping approaches consider only the single‐task platform. In this paper, we propose an efficient multi‐task mapping algorithm targeting regular 3D NoC that allows an incremental mapping and parallel execution of many applications onto different partitions on the 3D NoC. The proposed mapping algorithm is composed of three main steps aiming to reduce the communications overhead, exploiting the benefits of vertical links and improving the performances. The algorithm has been evaluated with various random and realistic benchmarks and compared with existing mapping algorithms for 3D NoC. The experimental results demonstrate that the proposed mapping strategy achieves significant performance in terms of communication cost, energy consumption and execution time.

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A deadlock-free routing algorithm for irregular 3D network-on-chips with wireless links

Mohseni

Reshadi

2017

J Supercomput

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Mapping multiple applications onto 3D NoC-based MPSoCs supporting wireless links

Cited by 3 publications

References 38 publications

A Parallel Architecture for the Partitioning around Medoids (PAM) Algorithm for Scalable Multi-Core Processor Implementation with Applications in Healthcare

A Parallel Architecture for the Partitioning around Medoids (PAM) Algorithm for Scalable Multi-Core Processor Implementation with Applications in Healthcare

A new efficient multi‐task applications mapping for three‐dimensional Network‐on‐Chip based MPSoC

A deadlock-free routing algorithm for irregular 3D network-on-chips with wireless links

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