Mapping applications with collectives over sub-communicators on torus networks

Bhatelé, Abhinav; Gamblin, Todd; Langer, Steven H.; Bremer, Peer-Timo; Draeger, Erik W.; Hamann, Bernd; Isaacs, Katherine E.; Landge, Aaditya G.; Levine, Joshua A.; Pascucci, Valerio; Schulz, Martin; Still, C. H.

doi:10.1109/sc.2012.75

Cited by 39 publications

(24 citation statements)

References 19 publications

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“…pF3D is a communication-heavy application and has been shown to benefit significantly from task mapping on Blue Gene/P [6]. This is the first attempt at mapping pF3D on Blue Gene/Q.…”

Section: Results With Pf3dmentioning

confidence: 99%

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Predicting application performance using supervised learning on communication features

Jain

Bhatelé

Robson

et al. 2013

Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis

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Task mapping on torus networks has traditionally focused on either reducing the maximum dilation or average number of hops per byte for messages in an application. These metrics make simplified assumptions about the cause of network congestion, and do not provide accurate correlation with execution time. Hence, these metrics cannot be used to reasonably predict or compare application performance for different mappings. In this paper, we attempt to model the performance of an application using communication data, such as the communication graph and network hardware counters. We use supervised learning algorithms, such as randomized decision trees, to correlate performance with prior and new metrics. We propose new hybrid metrics that provide high correlation with application performance, and may be useful for accurate performance prediction. For three different communication patterns and a production application, we demonstrate a very strong correlation between the proposed metrics and the execution time of these codes.

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“…pF3D is a communication-heavy application and has been shown to benefit significantly from task mapping on Blue Gene/P [6]. This is the first attempt at mapping pF3D on Blue Gene/Q.…”

Section: Results With Pf3dmentioning

confidence: 99%

“…We use a Python mapping tool, Rubik [6,13] Rest of the tree AB -average bytes MB -maximum bytes (a) Decision tree. Based on the training set and the learning scheme, conditions are computed to guide prediction based on features, e.g., maximum bytes and average bytes.…”

Section: Input Datamentioning

confidence: 99%

Predicting application performance using supervised learning on communication features

Jain

Bhatelé

Robson

et al. 2013

Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis

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“…All the experimental data for this study has been collected on Vulcan, an IBM Blue Gene/Q installation at LLNL. We use Rubik [12] to generate many different task mappings of the code running on a 5D torus. Based on the list of hardware components that could contribute to network congestion (Table I), we gather communication data from three network hardware counters: the number of packets sent on each link, the receive buffer length and the number of packets received on each link.…”

Section: A Gathering Data For Supervised Learningmentioning

confidence: 99%

Identifying the Culprits Behind Network Congestion

Bhatelé

Titus

Thiagarajan

et al. 2015

2015 IEEE International Parallel and Distributed Processing Symposium

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Abstract-Network congestion is one of the primary causes of performance degradation, performance variability and poor scaling in communication-heavy parallel applications. However, the causes and mechanisms of network congestion on modern interconnection networks are not well understood. We need new approaches to analyze, model and predict this critical behavior in order to improve the performance of large-scale parallel applications. This paper applies supervised learning algorithms, such as forests of extremely randomized trees and gradient boosted regression trees, to perform regression analysis on communication data and application execution time. Using data derived from multiple executions, we create models to predict the execution time of communication-heavy parallel applications. This analysis also identifies the features and associated hardware components that have the most impact on network congestion and in turn, on execution time. The ideas presented in this paper have wide applicability: predicting the execution time on a different number of cores, or different input datasets, or even for an unknown code, identifying the best configuration parameters for an application, and finding the root causes of network congestion on different architectures. I. MOTIVATION AND IMPACTNetwork congestion is widely recognized as one of the primary causes of performance degradation, performance variability, and poor scaling in communication-heavy applications running on supercomputers [5]. However, due to the complex nature of interconnection networks, as well as message injection and routing strategies, network congestion and its root causes for network resources and hardware components are not well understood. This makes the problem of mitigating and avoiding network congestion difficult. It also complicates the task of writing congestionavoiding and congestion-minimizing algorithms for communication and task mapping. Therefore, we need new approaches to understand and model network congestion in order to improve the performance of large-scale parallel applications.When a message is sent from one node to another, it is split into packets that pass through many resources and hardware components on the network. A packet starts in an injection FIFO on the source. It then passes through multiple network links and receive buffers on intermediate nodes before it finally lands in the reception FIFO on the destination. When shared by multiple packets, any or all of these network components can slow down individual flits, packets and messages. This paper aims to identify the hardware components that affect the performance of sending a message the most.Our approach is based on using supervised machine learning to build models that map from independent variables, representing different network hardware components, to a dependent variable -the execution time of the application. We only consider computationally balanced, communicationheavy parallel applications and, hence, focus on the communication fraction of the total executi...

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“…For example, Blue Gene/Q (BG/Q) uses a five-dimensional (5D) torus interconnect as the network between processing nodes. Different mappings of the 3D logical process grid of pF3D onto the 5D torus of BG/Q can make a significant difference in how messages are routed on the network and in turn, performance [6]. The effect was previously studied on a 3D torus interconnect with the aid of a visualization specific to that interconnect topology [26].…”

Section: Laser-plasma Interaction Simulationsmentioning

confidence: 99%

Combing the Communication Hairball: Visualizing Parallel Execution Traces using Logical Time

Isaacs

Bremer

Jusufi

et al. 2014

IEEE Trans. Visual. Comput. Graphics

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Fig. 1: Logical timeline and clustered logical timeline views from Ravel, a tool for visualizing parallel execution traces. Events are represented by boxes, colored by their wall-clock delay. The use of logical time reveals communication patterns and leverages developers' understanding of their program's structure. We use the logical time structure to cluster on any metric, which allow us to represent large-scale traces using explorable clusters while still depicting messages with full timelines for a subset of processes.Abstract-With the continuous rise in complexity of modern supercomputers, optimizing the performance of large-scale parallel programs is becoming increasingly challenging. Simultaneously, the growth in scale magnifies the impact of even minor inefficiencies -potentially millions of compute hours and megawatts in power consumption can be wasted on avoidable mistakes or sub-optimal algorithms. This makes performance analysis and optimization critical elements in the software development process. One of the most common forms of performance analysis is to study execution traces, which record a history of per-process events and interprocess messages in a parallel application. Trace visualizations allow users to browse this event history and search for insights into the observed performance behavior. However, current visualizations are difficult to understand even for small process counts and do not scale gracefully beyond a few hundred processes. Organizing events in time leads to a virtually unintelligible conglomerate of interleaved events and moderately high process counts overtax even the largest display. As an alternative, we present a new trace visualization approach based on transforming the event history into logical time inferred directly from happened-before relationships. This emphasizes the code's structural behavior, which is much more familiar to the application developer. The original timing data, or other information, is then encoded through color, leading to a more intuitive visualization. Furthermore, we use the discrete nature of logical timelines to cluster processes according to their local behavior leading to a scalable visualization of even long traces on large process counts. We demonstrate our system using two case studies on large-scale parallel codes.

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Mapping applications with collectives over sub-communicators on torus networks

Cited by 39 publications

References 19 publications

Predicting application performance using supervised learning on communication features

Predicting application performance using supervised learning on communication features

Identifying the Culprits Behind Network Congestion

Combing the Communication Hairball: Visualizing Parallel Execution Traces using Logical Time

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