Manufacturing intelligence for determining machine subgroups to enhance yield in semiconductor manufacturning

Abstract

Linewidth control is a critical issue for yield enhancement in semiconductor manufacturing. Most of the existing techniques such as run-to-run control have been developed to control the critical dimension (CD) in photolithography and etching process. However, few studies have addressed the tool behavior that would also affect the result of CD in etching process and the etch bias that is the CD difference between photolithograph and etching process. This study aims to propose a manufacturing intelligence (MI) approach to develop dispatching rules for etching tool in order to reduce the variation of critical dimension measured after etching process and determine the machine subgroups for compensating the etching bias. An empirical study was conducted to estimate the validity of proposed approach and the results showed practical viability of this approach. INTRODUCTIONWith the shrinking feature size of integrated circuits (ICs) in advanced technology, the tolerance of critical dimension (CD) becomes tight and slight. Photolithography and etching are two main process for determining CD in semiconductor manufacturing. The CD is the minimum width of patterned line or the distance between two pattern lines. In particular, the measurement of CD after exposure and development in photolithography process is developed critical dimension (DCD) and the CD measured after etching process called etched critical dimension (ECD), which represents the final linewidth for each layer. The ECD directly affects semiconductor device performance. In order to assure product quality and process yield, ECD must be controlled within the tolerance precisely. ECD variation may occur within a wafer, from wafer-to-wafer (W2W), from lot-to-lot (L2L) and between lots etched in different chambers. The CD variation occurred within a wafer is usually represented by the uniformity. It is generally a consequence of reactor design and determined by factors such as gas flow pattern, chamber symmetry and plasma source configuration. Wafer-to-wafer and lot-to-lot CD variation may occur because of poor repeatability at equipment, process and photolithography on incoming 1893 978-1-4577-2109-0/11/$26.00 ©2011 IEEE