Manufacturability and Speed Performance Demonstration of Porous ULK (k=2.5) for a 45nm CMOS Platform

Richard, E.; Fox, R.M.; Monget, C.; Zaleski, M.; Ferreira, Paulo; Guvenilir, A.; Brun, P.; Oilier, E.; Guillermet, M.; Mellier, M.; Petitdidier, S.; Delsol, R.; Besling, W.; Marinier, Laurent; Imbert, G.; Lagha, A.; Broussous, Lucile; Rasco, M.; Cregut, C.; Downey, S.W.; Huang, George; Haond, M.; Cave, N.; Perera, A.H.

doi:10.1109/vlsit.2007.4339683

Cited by 2 publications

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“…Titanium Nitride metal hard mask was first introduced for BEOL patterning at 65 nm [1] and 45 nm nodes [2]. Indeed, in this "Trench First Hard Mask" (TFHM) backend architecture, the dual hard mask stack (SiO 2 & TiN) allows a minimized exposure of ULK materials to damaging plasma chemistries, both for line/via etch sequence, and lithography reworks operations.…”

Section: Introductionmentioning

confidence: 99%

TiN Hard Mask Cleans with SC1 Solutions, for 64nm Pitch BEOL Patterning

Broussous

Krejcirova

Courouble

et al. 2014

SSP

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Titanium Nitride metal hard mask was first introduced for BEOL patterning at 65 nm [1] and 45 nm nodes [2]. Indeed, in this “Trench First Hard Mask” (TFHM) backend architecture, the dual hard mask stack (SiO2 & TiN) allows a minimized exposure of ULK materials to damaging plasma chemistries, both for line/via etch sequence, and lithography reworks operations. This integration scheme was successfully used for a BEOL pitch down to 90 nm for the 28 nm node, however, for the 14 nm technology node, 64 nm BEOL minimum pitch is required for the first metal levels. Because it is unable to resolve features below 80 nm pitch in a single exposure, conventional 193 nm immersion lithography must be associated with dual patterning schemes, so called Lithography-Etch-Lithography-Etch (LELE) patterning [3] for line levels and self-aligned via (SAV) process [4] for via patterning. In both cases, 2 lithography/etch/clean sequences are necessary to obtain one desired pattern, and associated reworks also become more challenging since first pattern is exposed to resist removal processes (plasma + wet clean). The reference wet cleans that were developed for 65 to 28 nm TiN hardmask patterning, utilizes commonly used chemistry for BEOL post-etch cleans, i.e. diluted hydrofluoric acid (dHF) followed by deionized water Nanospray (DIWNS) on 300 mm single wafer tool.

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Section: Introductionmentioning

confidence: 99%

TiN Hard Mask Cleans with SC1 Solutions, for 64nm Pitch BEOL Patterning

Broussous

Krejcirova

Courouble

et al. 2014

SSP

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“…Porous ultra low-k materials (Ulk) are now successfully integrated for the 45nm logic node using both Via First Trench Last (VFTL) [1] and Trench First Hard Mask (TFHM) [2,3] architectures. Indeed, for this technology node, continuous improvement of all elementary process steps allowed these architectures to reach final specified circuit performances.…”

Section: Introductionmentioning

confidence: 99%

"Damage Free" Cleaning for Advanced BEOL Interconnections

Broussous

Courouble

Richard

et al. 2012

SSP

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For the 32nm logic technology and beyond, more stringent specifications in terms of dimensions and materials integrity continue to drive the cleaning process improvements. In this paper, post-etch wet cleaning was optimized in order to address CD loss issues and metal hard mask cleaning improvement in a Trench First Hard Mask (TFHM) backend architecture. Based on materials compatibility tests and electrical results, this wet clean process should also be fully compatible with a Via First Trench Last (VFTL) architecture.

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Manufacturability and Speed Performance Demonstration of Porous ULK (k=2.5) for a 45nm CMOS Platform

Cited by 2 publications

References 0 publications

TiN Hard Mask Cleans with SC1 Solutions, for 64nm Pitch BEOL Patterning

TiN Hard Mask Cleans with SC1 Solutions, for 64nm Pitch BEOL Patterning

"Damage Free" Cleaning for Advanced BEOL Interconnections

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