Making Effective Decisions in Computer Architects’ Real-World: Lessons and Experiences with Godson-2 Processor Designs

Abstract

Although the design of many kinds of microprocessors has been under developing for several decades, the computer architecture R&D community lacks well documented lessons and experiences about design decisions in the research literature. In this paper, we systematically present the design decisions we made during the designing and prototyping of Godson-2 series processors. The 250MHz Godson-2B, 450MHz Godson-2C, and 1GHz Godson-2E processors that implement 64-bit, four-issue, out-of-order architecture were taped out in 2003, 2004, and 2005, respectively. Each processor triples its predecessor in the SPEC CPU2000 rates. Our first-hand experiences and lessons gained from these designs would provide unique perspectives and insights that are not available in any existing text books and/or published papers. We summarize 10 critical lessons and experiences based on hundreds of our attempts at architectural and design optimizations for performance improvement of Godson-2 series processors. The issues include silicon-simulation correlation, design balancing, performance optimizing, and pico-architecture tuning. We conclude that persistent improvement, attitude towards work-on-silicon design, and insightful understanding of software and fabrication process are the three most important factors for designing a high performance processor with low energy consumption.

A Novel Post-Silicon Debug Mechanism Based on Suspect Window

“…The breakpoint typically contains two components: comparators, to monitor important application specific signals such as program counters and internal instruction or data buses; and counters, to allow more complex breakpoint sequences. However, most post-silicon bugs are not predictable in design phase [4]. The monitoring signals and triggering conditions are difficult, if not impossible, to know in pre-silicon design phase for the non-determination of electrical bugs.…”

“…Since operation needs to be checked over the entire voltage, temperature, and frequency expected for the design, post-silicon debug has become the most time-consuming part -35% on average -of the development cycle of a new chip [3]. Considering the increasing cost, it is imperative to identify the bugs that remain in the chip as soon as the first silicon is available [4].…”