We propose a hardware reconfiguration scheme that, together with the adoption of an on-line testing strategy, can be employed to meet the goal of designing highly available systems to be implemented by means of very deep sub-micron technology. Compared to alternate software reconfiguration schemes frequently employed for high reliability systems, that proposed here allows to minimize the reconfiguration impact on system's performance, thus being suitable to applications with strong constraints in terms of performance and availability. Our scheme features self-checking ability with respect to its possible internal faults, thus guaranteeing that no erroneous reconfiguration can occur, because of faults affecting the reconfiguration hardware itself.