Machine Leaming to Set Meta-Heuristic Specific Parameters for High-Level Synthesis Design Space Exploration

Wang, Zi; Schäfer, Benjamin Carrión

doi:10.1109/dac18072.2020.9218674

Cited by 20 publications

(9 citation statements)

References 22 publications

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“…Machine learning can be a good approach for automatically setting the hyperparameters. For example, to effectively explore the design space in high-level synthesis, the authors presented a machine learning-based approach to automatically set the hyperparameters of three meta-heuristics algorithms: simulated annealing algorithm, genetic algorithm, and ant colony optimizations algorithm [7].…”

Section: Related Workmentioning

confidence: 99%

Machine learning to set hyperparameters for overlapping community detection algorithms

Xiao

Wang

2023

The Journal of Engineering

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The Local Fitness Method (LFM) and Speaker‐Listener Label Propagation (SLPA) algorithms are widely used to detect overlapping communities in complex networks. The main problem with these two algorithms is that they are extremely sensitive to the setting of the hyperparameters. Previous methods set the hyperparameters of LFM or SLPA based on either empirical values or random choices, resulting in a large amount of computation for adjusting those parameters. To solve this problem, in this paper, a machine‐learning‐based approach is proposed to automatically set the hyperparameters of these two algorithms. Experimental results show that compared with the manual method, automatically setting the hyperparameter using machine learning models can lead to higher‐quality divisions. Furthermore, in comparison to the well‐known hyperparameter tuning method using Bayesian Optimization, the proposed predictive model‐based approach can find suitable para meters for LFM and SLPA much faster, while achieving competitive results in terms of division quality.

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Section: Related Workmentioning

confidence: 99%

Machine learning to set hyperparameters for overlapping community detection algorithms

Xiao

Wang

2023

The Journal of Engineering

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“…This chromosome is then combined and mutated based on predefined crossover and mutation probabilities to produce an offspring. Because metaheuristics are very sensitive to their hyperparameters (e.g., mutation rate and cross-over rate, exitcondition), we made use of a previously published method that allows automatically setting these hyperparameters in the context of HLS DSE [25].…”

Section: Design Space Exploration: Micro-architecture and System Levelmentioning

confidence: 99%

Building Complete Heterogeneous Systems-on-Chip in C: From Hardware Accelerators to CPUs

Shetty

Schaefer

2021

Electronics

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High-Level Synthesis (HLS) dramatically accelerates the design and verification of individual components within larger VLSI systems. With most complex Integrated Circuits (ICs) being now heterogeneous Systems-on-Chip (SoCs), HLS has been traditionally used to design the dedicated hardware accelerators such as encryption cores and Digital Signal Processing (DSP) image processing accelerators. Unfortunately, HLS is a single process (component) synthesis method. Thus, the integration of these accelerators has to be performed at the RT level (Verilog or VHDL). This implies that the system-level verification needs to be performed at lower levels of abstraction, which significantly diminishes the benefits of using HLS. To address this, this work presents a methodology to generate entire heterogeneous SoCs in C. This work introduces two main contributions that enable this: first, an automatic bus generator that generates a synthesizable behavioral description of standard on-chip buses and, second, a library of synthesizable bus interfaces that allow any component in the system to send or receive data through the bus. Moreover, this work investigates the generation of processors and interfaces (peripherals) at the behavioral level as these are important parts of any SoCs, but have long been thought not to be efficiently synthesizable using HLS. Generating complete SoCs in C has significant advantages over traditional approaches. First, it enables the generation of fast cycle-accurate simulation models of the entire SoC, making the verification faster and easier. Second, it allows completely isolating the bus implementation details from the developers’ view, allowing the change between bus protocols with only minor changes in the designers’ code. Thirdly, it allows generating different SoC variants quickly by only changing the HLS synthesis options. Experimental results highlight these benefits.

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“…ML techniques have been applied to improve HLS tools from the following three aspects: fast and accurate result estimation [30,37,105,106,140,161,169], refining conventional DSE algorithms [74,104,146], and reforming DSE as an active-learning problem [92,93,109,177]. In addition to achieving good results on individual problems, previous studies have also introduced new generalizable techniques about feature engineering [30,105,106,161,169], selection and customization of ML models [140], and design space sampling and searching strategies [93,109,177].…”

Section: High Level Synthesismentioning

confidence: 99%

“…Random Forest [109] Improving conventional algorithms Initial point selection Quadratic regression [74] Generation of new sample Decision Tree [104] Hyper-parameter selection Decision Tree [146] the decision tree. Then it generates new design configurations with the decision tree and keeps the dominating designs [104].…”

Section: Reduce Prediction Error With Fewer Samplesmentioning

confidence: 99%

“…In a recent study, Wang and Schäfer [146] propose several ML techniques to help decide the hyper-parameter settings of three meta-heuristic algorithms: SA, GA and Ant Colony Optimizations (ACO). For each algorithm, the authors build an ML model that predicts the resultant design quality (measured by Average Distance to the Reference Set, ADRS) and runtime from hyper-parameter settings.…”

Section: Reduce Prediction Error With Fewer Samplesmentioning

confidence: 99%

See 1 more Smart Citation

Machine Learning for Electronic Design Automation: A Survey

Huang

et al. 2021

Preprint

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With the down-scaling of CMOS technology, the design complexity of very large-scale integrated (VLSI) is increasing. Although the application of machine learning (ML) techniques in electronic design automation (EDA) can trace its history back to the 90s, the recent breakthrough of ML and the increasing complexity of EDA tasks have aroused more interests in incorporating ML to solve EDA tasks. In this paper, we present a comprehensive review of existing ML for EDA studies, organized following the EDA hierarchy.

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Machine Leaming to Set Meta-Heuristic Specific Parameters for High-Level Synthesis Design Space Exploration

Cited by 20 publications

References 22 publications

Machine learning to set hyperparameters for overlapping community detection algorithms

Machine learning to set hyperparameters for overlapping community detection algorithms

Building Complete Heterogeneous Systems-on-Chip in C: From Hardware Accelerators to CPUs

Machine Learning for Electronic Design Automation: A Survey

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