MACGDI: Low Power MAC Based Filter Bank Using GDI Logic for Hearing Aid Applications

Subbulakshmi, N.; Manimegalai, R.

doi:10.18178/ijeee.5.3.235-239

Cited by 8 publications

(2 citation statements)

References 9 publications

(8 reference statements)

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“…It is drawbacks is drop in threshold voltage, static power consumption and delay increases with long pass-transistor chains. The Double Pass-transistor Logic (DPL) approach is the modi ed of CPL approach, it has some advantages as well-balanced input capacitance No drop voltage, no need buffers, full swing and low power, its main problems are large area and inverters need [29][30][31][32].…”

Section: Low Power Vlsi Approaches Overviewmentioning

confidence: 99%

Optimizing of Communications Systems Power Efficiency Considerations: Efficient Implementing Approach of Hamming Codes Utilizing FS-GDI

El‐Bendary

El-Badry

2021

Preprint

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Due to the power efficiency importance of digital signal processing and data protection in different communications systems, this paper proposes an efficient design of different Hamming Codes utilizing Full Swing- Gate Diffusion Input (FS-GDI) approach. The proposed codes design aims to improve the power efficiency and the required area through reducing the required number of transistors. FS-GDI is a new low power VLSI design approach, it is a power effective approach for realizing the different logic gates. In this work, the Hamming codes (7, 4) and (11, 7) are designed by utilizing the original GDI, FS-GDI and the traditional CMOS approaches. The amount of consumed power, delay time, Power Delay Product (PDP) and hardware simplicity-Number of Transistors (No.Ts) are employed as a metrics for evaluating the efficiency of the proposed design compared to the traditional design. The design simulation experiments are executed utilizing Cadence Virtuoso simulator package under 65nm technology. The simulation experiments revealed these proposed codes achieve delay time reduction by 52.91% and 10% for Hamming codes (7, 4) and (11, 7), respectively On the other hand, the Hardware (H/W) of these codes became more simple where the H/W simplicity of the used Hamming codes is reduced 50 % CMOS approaches respectively. From the results analysis, the proposed design achieves efficient power and the delay optimizing of Hamming codes utilizing the FS-GDI approach. On the other hand, the power consumption and area in communications systems due to the encoding process can be reduces.

show abstract

Section: Low Power Vlsi Approaches Overviewmentioning

confidence: 99%

Optimizing of Communications Systems Power Efficiency Considerations: Efficient Implementing Approach of Hamming Codes Utilizing FS-GDI

El‐Bendary

El-Badry

2021

Preprint

View full text Add to dashboard Cite

show abstract

“…It is drawbacks is drop in threshold voltage, static power consumption and delay increases with long pass-transistor chains. The Double Pass-transistor Logic (DPL) approach is the modified of CPL approach, it has some advantages as well-balanced input capacitance No drop voltage, no need buffers, full swing and low power, its main problems are large area and inverters need [29][30][31][32].…”

Section: Low Power Vlsi Approaches Overviewmentioning

confidence: 99%

A New Systematic Encoding Circuit of Hamming (15, 11) Using Low-Power XOR-FS-GDI Based Logic Gate: Fast Computing and Efficient Area FEC

El‐Bendary

El-Badry

2021

Preprint

View full text Add to dashboard Cite

Due to the power efficiency importance of digital signal processing and data protection in different communications systems, this paper proposes an efficient design of different Hamming Codes utilizing Full Swing- Gate Diffusion Input (FS-GDI) approach. The proposed codes design aims to improve the power efficiency and the required area through reducing the required number of transistors. FS-GDI is a new low power VLSI design approach, it is a power effective approach for realizing the different logic gates. In this work, the Hamming codes (11, 7) and (15, 11) are designed by utilizing the original GDI, FS-GDI and the traditional CMOS approaches. The amount of consumed power, delay time, Power Delay Product (PDP) and hardware simplicity-Number of Transistors (No. Ts) are employed as a metrics for evaluating the efficiency of the proposed design compared to the traditional design. The design simulation experiments are executed utilizing Cadence Virtuoso simulator package under 65nm technology. The simulation experiments revealed these proposed codes achieve delay time reduction by 52.91% and 10% for Hamming codes (7, 4) and (11, 7), respectively On the other hand, the Hardware (H/W) of these codes became more simple where the H/W simplicity of the used Hamming codes is reduced 50 % CMOS approaches respectively. From the results analysis, the proposed design achieves efficient power and the delay optimizing of Hamming codes utilizing the FS-GDI approach. On the other hand, the power consumption and area in communications systems due to the encoding process can be reduces.

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Transport Tracking Using RFID and GSM Based Technique

Subbulakshmi¹,

Chandru²,

Manimegalai

2021

IoT and Analytics for Sensor Networks

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MACGDI: Low Power MAC Based Filter Bank Using GDI Logic for Hearing Aid Applications

Cited by 8 publications

References 9 publications

Optimizing of Communications Systems Power Efficiency Considerations: Efficient Implementing Approach of Hamming Codes Utilizing FS-GDI

Optimizing of Communications Systems Power Efficiency Considerations: Efficient Implementing Approach of Hamming Codes Utilizing FS-GDI

A New Systematic Encoding Circuit of Hamming (15, 11) Using Low-Power XOR-FS-GDI Based Logic Gate: Fast Computing and Efficient Area FEC

Transport Tracking Using RFID and GSM Based Technique

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