&lt;title&gt;Overlay Tolerances For VLSI Using Wafer Steppers&lt;/title&gt;

Levinson, Harry; Rice, Rory

doi:10.1117/12.968405

Cited by 6 publications

(3 citation statements)

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“…Experience has shown that total values for semiconductor manufacturing processes typically are between those obtained by assuming completely random or completely systematic behavior of the individual contributions to variation. 13,14 The above analysis explains what factors are related to direct exposure latitude and must be included in the "exposure latitude" budget. Several factors were found to have a relationship between linewidth variation and the resist-edge log-slope as exposure dose, where resist-edge log-slope is the analog of the image log-slope, compensated for the effects of diffusion during post-exposure bake.…”

Section: Discussionmentioning

confidence: 99%

Proposal for determining exposure latitude requirements

Levinson

Koenig³

et al. 2008

Optical Microlithography XXI

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To determine the magnitude of the exposure latitude required for a process to be manufacturable, additional factors are considered that have a similar relationship between linewidth variation and image log-slope. Such parameters include resist thickness, flare, post-exposure bake temperature, and line-edge roughness. To obtain consistency between theory and experiment it is necessary to use the resist-edge log-slope generalization of image log-slope. Inclusion of these additional factors increases the required exposure latitude several times more than would be considered necessary from exposure tool dose control alone.

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Section: Discussionmentioning

confidence: 99%

Proposal for determining exposure latitude requirements

Levinson

Koenig³

et al. 2008

Optical Microlithography XXI

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“…In this case, they will both have an error component that the common scanner implements. This common error can come from the fact that C1 and C2 were exposed with common aberrations 17 (assuming the illumination for C1 and C2 are similar), wafer chucks, reticle holders, baseline offsets, alignment offsets, pattern polarity, etc. In such situations, one cannot simply RSS the error sources because they are correlated and one must determine the correlation factor ρ.…”

Section: Estimating Indirectly Controlled Overlay Errormentioning

confidence: 99%

Overlay error statistics for multiple-exposure patterning

Gabor

Felix

2019

J. Micro/Nanolith. MEMS MOEMS

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Background: The mathematical equations that explain overlay error of multiple-exposure patterning schemes have not been fully described in the literature and some commonly accepted methods lead to inaccurate estimated and/or measured overlay error. Aims: Develop the proper mathematical framework, using a first principles statistical approach, so that engineers using multiple-exposure patterning can determine the overlay impact and overlay controls needed. Alert patterning community that grouped overlay metrology of multiple-exposures undermeasures the true overlay error. Approach: Use image placement error and population-based statistics to enable a mathematical framework to be established that predicts the actual overlay error for an overlaying pattern that minimizes overlay error back to a pattern that is patterned with multiple-exposure patterning. Results: The overlay error between two patterns is usually less than the root sum square of the two overlay error values of the patterns individually measured to a common prior pattern. Overlay error for a pattern minimizing back to multiple-prior patterns increases quickly as systematic overlay error between the prior patterns increases. Conclusions: Controlling systematic overlay error between patterns of a multipatterned layer is important for subsequent patterns that need to minimize overlay error back to the composite multipatterned layer. The ratio between the overlay error determined with metrology and true overlay can be calculated.

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“…The following equations are used in this work. [5] D=T-RY+SX D=T+R,X+SY (1) Here, D and D are overlay errors at the point (X,Y) in the wafer, T and T are translation errors, R and R are rotational errors, and S and S, are scaling errors of X and Y direction, respectively. The scaling errors are calculated with this equation by means of a least square method.…”

Section: -1 Experimental Proceduresmentioning

confidence: 99%

Mask overlay scaling error caused by exposure energy using a stepper

et al. 1993

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The wafer expansion scaling error in overlay accuracy using a stepper has been investigated. The scaling error depends on the exposure energy, mask aperture ratio and wafer surface reflectance. The scaling error is observed only along the X axis when using a global alignment method. From the experimental results, we present a mechanism which explains the scaling error. Then the occurrence of the scaling error according to the mechanism is simulated by the heat conduction and displacement analysis. The cause of the scaling error is proved to be local wafer expansion due to the accumulated heat generated by the exposure light energy.

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<title>Overlay Tolerances For VLSI Using Wafer Steppers</title>

Cited by 6 publications

References 0 publications

Proposal for determining exposure latitude requirements

Proposal for determining exposure latitude requirements

Overlay error statistics for multiple-exposure patterning

Mask overlay scaling error caused by exposure energy using a stepper

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