<title>Analog multiply/accumulate implementation and performance results on the DOC II platform</title>

Abstract

Analog testing and primitive evaluation has been performed on OptiComp's second generation digital optical computer (DOC II) platform. Preliminary results indicate that analog addition can be achieved at up to 6 bits ofaccuracy. The DOC II components whichhavebeen integrated for this study include: thelaserdiode array, thelasercollimatorand lxi imaging barrel, thepoint source modulator GaP Bragg cell, and a single channel APD /transimpedance amplifier. Two analog pulse trains are used to drive two independent sets of Bragg cell channels. The first order deflected light is collected and summed on an APD photodetector, amplified with a high gain, wide bandwidth, transimpedance amplifier and digitized using an Hewlett Packard digitizing scope. Testing was performed using a GPIB instrumentation interface. Ultimately, this analog computing architecture could produce a 256 vectormultiply to 256 x 256 matrix which would yield a product with 8 bit resolution. MOTIVATIONTo approach the problem of matrix multiplication, matrix vectorpartitioning is implemented to reduce the matrix set into workable subsets ( Figure 1). The primary matrix dimensions are 256x 256 resulting in a total inner product summation of 256 terms for each output. As shown by Psaltis et al [1] and Downie eta! [2], analog vector matrix multiplication provides an extremely high Figure 1: Matrix/vector partitioning directions. If the SLM' s are flood illuminated, the optical result of the pixelation patterns generated by the modulators are transmitted and summed onto the data source vector pixels y256 -y1 [3]. OPTICAL HARDWARE SUMMARYThis architecture is further refined and implemented through the utilization of OptiComp's digital optical computer (DOC II) platform which is ageneral purpose, 32-bit dual rail processor running RISC microcode [4 and 5]. DOC II can be retrofitted to implement a number of optical processing applications. The DOC II components which havebeen integrated for this study include: the laser diode array, the performance mechanism for approximate computation.- ( 1 ) Through partitioning, the problem can be solved in 16 1 passes. Each column is multiplied by each partitioned row of the second matrix and the resultant vector is summed. Partitioning can then be implemented into an architecture (256) which can describe the data routing ( Figure 2).

<title>Implementation and assessment of advanced analog optical vector-matrix processor</title>

“…However, there are some data. Guilfoyle et al 2 have demonstrated the addition of numbers with 84 distinct levels using an architecture and spatial light modulators that can be extended to large scale systems. Chugui and Krivenkov3 have measured 7-bit average accuracy using an incoherent light source and diffuser.…”