LP‐1: Late‐News Poster: Polysilicon TFT Display Driver Circuits on Stainless Steel Foil Substrates

Abstract

We have demonstrated the performance of circuits on stainless steel and compared them to those fabricated on quartz substrates. We have modeled the substrate dependence of the minimum and maximum operating frequency of a Shift Register, and found close agreement with our experimental measurements. This model can be used as a design guideline for future development of circuits on conducting substrates.

Plastic‐film displays with NanoBlock IC drivers integrated by a fluidic self‐assembly process

“…Relevant examples include the low-temperature formation of a-Si TFT circuits on plastic film, 13,14 MIM diode arrays on plastic film, 15,16 laser-recrystallized p-Si TFTs on plastic film, 17 a-Si TFTs on stainless-steel foil, 18,19 and p-Si TFTs on stainless steel. 20 An increasing amount of attention is also being given to organic electronics, with examples of displays based on organic TFT arrays having been demonstrated by several groups. [21][22][23][24][25] Nevertheless, the cost and performance of these active-matrix arrays on film, as well as compatibility with existing manufacturing equipment, have to date proven problematic.…”

P‐179: Flexible Organic Electroluminescent Displays with Optical Transparency Using Electrically Conducting Polymers

“…The hole injection layer, ELM 200 (t-aromatic amine derivative, ELM co.), hole transport layer, N,N'-di(naphthalene)-N,N'-diphenyl-benzidine (NPB), and the emitting layer, tris-(8-hydroxyquinolinolato) aluminum(III) (Alq 3 ), and cathodes, LiF/Al, were deposited on the polymer electrode. Details of the device fabrication and characterization have been described elsewhere [20][21]. Briefly, ELM 200 (50 nm), NPB (30 nm), Alq 3 (50 nm), LiF (1 nm), and Al (100 nm) were prepared by sequential vacuum (base pressure ~10 -7 torr) deposition onto the patterned conducting polymer electrode substrates.…”

3.3: Display Driver Circuits Fabricated on Flexible Stainless Steel Foils

“…The maximum clock frequency of a shift register (defined as the maximum frequency for bit error-free operation) depends on the register's propagation delay and, as such, is a function of device characteristics (effective mobility, threshold voltage), device geometry (primarily channel length) and operation conditions (supply voltage, clock signal levels) [11]. In order to design a register circuit for maximum performance, the effect of the parasitic capacitance to the conductive substrate should also be taken into account; we have shown that this parasitic capacitance is detrimental to circuit performance if the electrical isolation dielectric deposited on the substrate is not thick enough [12]. As a simple design rule, we consider a simple CMOS inverter, with device geometries W p and W n (PMOS and NMOS, respectively), channel length L and oxide capacitance C ox .…”