Low voltage electrowetting-on-dielectric platform using multi-layer insulators

Abstract

A low voltage, two-level-metal, and multi-layer insulator electrowetting-on-dielectric (EWD) platform is presented. Dispensing 300pl droplets from 140nl closed on-chip reservoirs was accomplished with as little as 11.4V solely through EWD forces, and the actuation threshold voltage was 7.2V with a 1Hz voltage switching rate between electrodes. EWD devices were fabricated with a multilayer insulator consisting of 135nm sputtered tantalum pentoxide (Ta 2 O 5 ) and 180nm parylene C coated with 70nm of CYTOP. Furthermore, the minimum actuation threshold voltage followed a previously published scaling model for the threshold voltage, V T , which is proportional to (t/ε r ) 1/2 , where t and ε r are the insulator thickness and dielectric constant respectively. Device threshold voltages are compared for several insulator thicknesses (200nm, 500nm, and 1µm), different dielectric materials (parylene C and tantalum pentoxide), and homogeneous versus heterogeneous compositions. Additionally, we used a two-level-metal fabrication process, which enables the fabrication of smaller and denser electrodes with high interconnect routing flexibility. We also have achieved low dispensing and actuation voltages for scaled devices with 30pl droplets.

Improving the dielectric properties of an electrowetting-on-dielectric microfluidic device with a low-pressure chemical vapor deposited Si3N4 dielectric layer

“…Instead of decreasing the thickness of dielectric layer, some researchers used different dielectric materials to decrease the voltage for droplet manipulation. 26 Lin et al used 17 V rms for manipulation of a water droplet. 27 Lee and Kong used a multi-layered dielectric layer composed of amorphous fluoropolymer (AF1600), Si 3 N 4 , and titania (TiO 2 ) to enhance the dielectric quality.…”

Design Automation for Digital Microfluidic Biochips

“…7 (a), the general diagram of a 2D EWOD chip contains a patterned electrode array, conduction wires, electrical pads, and a substrate [17], [34], [42], [46]. In order to enable the fabrication of smaller and denser electrodes with high interconnect routing flexibility, a typical two-metal-layer design process of EWOD chips is presented in Refs.…”

“…[3], [34]. It comprises two metal layers of 2D electrodes patterned in the first layer and conduction wires routed in the second layer, as well as an inter-insulator of silicon dioxide for via holes patterning.…”

Silicon photonic sensors incorporated in a digital microfluidic system

“…Many EWOD lab-on-a-chip device configurations exist, mainly differing in the actuation electrode architecture and the type of dielectric material used. This dielectric layer is a crucial element in the EWOD lab-on-a-chip configuration, as it isolates the liquid droplet from the actuation electrodes, thereby preventing electrolysis when a voltage is applied across the droplet [23,24]. Below, we describe the fabrication process for our EWOD lab-on-a-chips based on the protocol of [25].…”