Low temperature polysilicon TFTs: a comparison of solid phase and laser crystallization

Plais, F.; Legagneux, Pierre; Reita, C.; Huet, O.; Petinot, F.; Pribat, Didier; Godard, Bruno; Stehle, M.; Fogarassy, É.

doi:10.1016/0167-9317(95)00093-n

Cited by 34 publications

(10 citation statements)

References 2 publications

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“…1 Introduction Pulsed laser annealing of semiconductor materials has been widely employed in the processing of semiconductor thin films for applications such as crystallization of amorphous silicon (a-Si) thin films [1,2], activation of implanted dopants in silicon for ultra-shallow junctions in microelectronics [3,4], pulsed laser melting of compound semiconductors [5] and laser doping [6]. In several of these applications laser annealing has proven to be highly attractive due to localization of energy deposition and this aspect extends its appeal to effective processing at smaller length scales.…”

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confidence: 99%

Pulsed laser annealing of semiconductor structures for functional devices

Misra

Rogers

et al. 2008

Phys. Status Solidi (c)

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We review our progress on the laser processing of semiconductor microstructures and nanostructures for functional devices. Fundamental research conducted to understand the melt‐mediated phase transformations induced by nanosecond laser irradiation in thin semiconductor films is presented. A detailed experimental study analyzed the physical mechanisms of the explosive crystallization in amorphous germanium that produces large area self‐sustained crystal growth. The double laser crystallization method that combines a nanosecond laser pulse and a modulated microsecond laser beam was shown to produce ultra‐large grain polycrystalline silicon, enabling fabrication of thin film transistor devices of high performance from amorphous silicon films. The crystal growth process was imaged by temporally resolved photography. Non‐melt Excimer Laser annealing of thin silicon‐on‐insulator films for dopant activation was demonstrated. Applying multiple laser pulses below the melting threshold effected solid phase annealing of the single crystalline silicon films. Semiconductor nanowires are one‐dimensional nanostructures that have displayed the potential to be used with low‐cost flexible plastic substrates for applications such as large‐area displays and sensor arrays. The excimer laser annealing of silicon nanowires is demonstrated as an alternative to conventional thermal annealing for dopant activation. The optical absorption of the nanowires is discussed and the effect of parameters such as fluence and number of pulses is investigated. The interaction of laser pulses with silicon nanowires is investigated through numerical simulations. (© 2008 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

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confidence: 99%

Pulsed laser annealing of semiconductor structures for functional devices

Misra

Rogers

et al. 2008

Phys. Status Solidi (c)

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“…Although the SPC is the simplest technology among the other crystallization techniques, it needs to be performed by annealing at 600°C for 24 h, which results in a poor throughput for mass production. In addition, the high thermal stress results in micro-twin defects and high-angle grain boundaries (GBs) as well as shrinkage in the glass substrate [6,7]. In terms of mass production, ELA technology is currently adopted in small-scaled portable FPD industries because of its high-quality poly-Si.…”

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confidence: 99%

Progress of p-channel bottom-gate poly-Si thin-film transistor by nickel silicide seed-induced lateral crystallization

et al. 2016

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Excimer laser annealing (ELA) is known to be the most common crystallization technology for the fabrication of low-temperature polycrystalline-silicon (poly-Si) thinfilm transistors (TFTs) in the mass production industry. This technology, however, cannot be applied to bottom-gate (BG) TFTs, which are well developed for the liquid-crystal display (LCD) back-planes, because strong laser energy of ELA can seriously damage the other layers. Here, we propose a novel high-performance BG poly-Si TFT using Ni silicide seed-induced lateral crystallization (SILC). The SILC technology renders it possible to ensure low damage in the layers, smooth surface, and longitudinal large grains in the channel. It was observed that the electrical properties exhibited a steep subthreshold slope of 110 mV/dec, high field-effect mobility of 304 cm 2 /Vsec, high I on /I off ratio of 5.9 9 10 7 , and a low threshold voltage of -3.9 V.

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“…Poly-Si TFTs are generally made by depositing a-Si:H thinfilm onto a glass sheet using chemical vapor deposition (CVD) and subsequently exposing the deposited glass to high temperatures for a sufficient period of time to crystallized the a-Si:H into poly-Si, which has been named "solid-phase crystallized (SPC) poly-Si" [13], [14]. This crystallization step is typically performed at 600 • C for several tens of hours, or alternatively, rapid thermal annealing [15] or laser excimer annealing [16] can be employed, wherein a laser or, some other source of a sharp temperature gradient, can be used to minimize the heating of the glass substrate [17]. In either case, however, the substrate still experiences a temperature of 400 to 600 • C.…”

Section: Introductionmentioning

confidence: 99%

Thermal Stress Effects on the Electrical Properties of p-Channel Polycrystalline-Silicon Thin-Film Transistors Fabricated via Metal-Induced Lateral Crystallization

Park

Seok

Kiaee

et al. 2015

IEEE Trans. Semicond. Manufact.

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We developed a method to compact the glass sheets of a flat-panel displays that use metal-induced laterally crystallized (MILC) polycrystalline-silicon (poly-Si) thin-film transistors (TFTs), and the effects of thermal stress on the fabricated devices were compared against those of a bare-glass device. The glass substrate was exposed to a temperature of 650 • C for 40 h in order to suppress the glass shrinkage to 0.01 ppm, which suitable for a MILC poly-Si TFT process. The compressive strain that originates from glass shrinkage generally increases the size of the micro-cracks and the vacancies, and as a result, most of the electrical parameters of a bare glass device (such as the on-current, off-current, field-effect mobility, subthreshold slope, and threshold voltage) had a higher level of degradation than those of the device with the compacted glass. The increase in the on-current and the field-effect hole mobility under the compressive strain for poly-Si TFTs showed a similar behavior to that of single-crystalline-silicon (c-Si) TFTs under compressive strain. However, the increase in the off-current was the converse of that of strained c-Si TFT.Index Terms-Metal-induced lateral crystallization (MILC), polycrystalline-silicon (poly-Si) thin-film transistor (TFT), glass shrinkage, thermal stress.

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Low temperature polysilicon TFTs: a comparison of solid phase and laser crystallization

Cited by 34 publications

References 2 publications

Pulsed laser annealing of semiconductor structures for functional devices

Pulsed laser annealing of semiconductor structures for functional devices

Progress of p-channel bottom-gate poly-Si thin-film transistor by nickel silicide seed-induced lateral crystallization

Thermal Stress Effects on the Electrical Properties of p-Channel Polycrystalline-Silicon Thin-Film Transistors Fabricated via Metal-Induced Lateral Crystallization

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