Low temperature (Ba,Sr)TiO/sub 3/ capacitor process integration (LTB) technology for gigabit scaled DRAMs

SrTiO 3 ͑STO͒ thin films were grown on Si wafer, Pt-and Ru-coated Si wafers, respectively, by an atomic layer deposition ͑ALD͒ technique using conventional metallorganic precursors, Sr͑C 11 H 19 O 2 ͒ 2 ͑Sr͑thd͒ 2 ͒ and Ti͑Oi-C 3 H 7 ͒ 4 ͑TTIP͒ as Sr-and Tiprecursors, respectively, with a remote-plasma activated H 2 O vapor as the oxidant at a wafer temperature of 250°C. Patterned Si wafers with contact holes having a diameter of 0.13 and 1 µm depth ͑aspect ratio of 8͒ was used in order to test the film-thickness and cation-composition conformalities over the contact hole surface. The ALD behavior of the STO film was critically dependent on the Sr͑thd͒ 2 source heating temperature. When the Sr source temperature was Ͻ ϳ200°C ͓Sr͑thd͒ 2 melting temperature͔ stoichiometric STO films were deposited with a good process reliability. Excellent film thickness and cation composition conformalities ͑nonuniformity Ͻ3%͒ over the severe contact hole structure were obtained by the optimized precursor supply and deposition conditions. It was also observed that most of the input TTIP precursor molecules did not chemically adsorb on the SrO surface, possibly due to oversaturation of the SrO surface by the Sr͑thd͒ 2 molecules or thermally modified Sr͑thd͒ 2 molecules as a result of the heating process of the Sr͑thd͒ 2 when the Sr-source temperature was Ͼ ϳ200°C. This difficulty resulted in a nonuniform cation composition ratio along the contact hole.High-dielectric constant thin films such as SrTiO 3 ͑STO͒ and ͑Ba,Sr͒TiO 3 ͑BSTO͒ 1-5 have attracted great interest as the capacitor dielectrics of dynamic random access memory ͑DRAM͒ devices. Recently, these materials have also been actively studied for the high-frequency tunable devices, 6,7 decoupling capacitors, 8 and gate dielectric 9,10 applications. Among these, the DRAM capacitor applications require conformal deposition over a 3-dimensional structure with a feature size Ͻ0.1 m in terms of film thickness and composition, which is not required in other applications.The low-temperature ͑Ͻ500°C͒ metallorganic chemical vapor deposition ͑MOCVD͒ process has been extensively studied for producing STO and BSTO thin films for DRAM applications due to its good film step coverage over a severe 3D surface topology, and nondamaging deposition on the underlying electrode stack. 11,12 However, conformal deposition over the entire surface area of such an extreme geometry in terms of the chemical composition as well as the thickness has not necessarily been confirmed even for lowtemperature MOCVD processes. The authors have reported extensive experimental results on the composition and thickness variations of the MOCVD STO and BSTO films deposited at wafer temperatures ranging from 420 to 440°C on a capacitor hole pattern with dimensions of 0.15 ϫ 0.40 ϫ 0.57 ͑depth͒ m 3 where two shower-head-type and one dome-type MOCVD chamber with two different precursor sets were used. 13,14 From the study, it was found that obtaining a conformal composition and film thickness over the 3D geometry using th...

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confidence: 99%

Chemically Conformal ALD of SrTiO[sub 3] Thin Films Using Conventional Metallorganic Precursors

Kwon

Kim

Cho

et al. 2005

“…The low temperature ͑Ͻ500°C͒ metallorganic ͑MO͒ chemical vapor deposition ͑CVD͒ process for producing ͑Ba,Sr͒TiO 3 ͑BST͒ thin films is becoming crucial for merged memory and logic ͑MML͒ and dynamic random access memory devices ͑DRAM͒ having minimum feature sizes less than 0.13 m. [1][2][3] Good film step coverage over a severe three-dimensional surface topography and nondamaging deposition on the underlying electrode stack are key merits of the low temperature process over the high temperature ͑Ͼ600°C͒ process. The expected capacitor structure for 0.13 m devices is a contact hole type.…”

mentioning

confidence: 99%

“…The expected capacitor structure for 0.13 m devices is a contact hole type. [1][2][3] This is mainly because of the difficulty in etching a noble metal electrode, such as Pt and Ru, to the node type bottom electrode with a lateral dimension of about 0.13 ϫ 0.33 m and a height larger than 0.5 m. With the hole type capacitor structure, the thin bottom electrode is deposited in the hole by a CVD technique followed by a chemical mechanical polishing ͑CMP͒ or dry etching back of the layer to separate each bottom electrode. Therefore, the difficulty in etching the bottom electrode can be eliminated.…”

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confidence: 99%

Compositional Variation of Metallorganic Chemically Vapor Deposited SrTiO[sub 3] Thin Films along the Capacitor Hole Having a Diameter of 0.15 μm

Hwang

Park

Hwang

et al. 2001

Variations in the cation concentration ratio of metallorganic chemically vapor deposited SrTiO3 (STO) thin films along a capacitor hole having a diam of 0.15 μm, were investigated. Even under the deposition conditions that produce stoichiometric STO films on a nonpatterned wafer, the Sr/Ti ratio is greatly decreased along the depth direction of the hole. The degree of variation depended on the flow rate of the precursors. In some cases, a film having a Ti concentration of more than 90% was deposited at the bottom of the hole with a Ti concentration of less than 30% at the top of the hole. A plausible reason for the compositional variation was suggested on the basis of the decreased diffusion speed of the precursor molecules in the small sized holes. © 2001 The Electrochemical Society. All rights reserved.

“…The oxidation resistance of both the RTN and the RTO diffusion barriers themselves was superior to that of nitride barriers ͑TiN, WN, TaN, TiAlN, TiSiN, TaSiN͒ reported by others. [7][8][9][10][11][12] In the reaction-controlled region, that is, under the thermal budgets of the capacitor fabrication processes, previously reported barriers lead to by-products on the surface of the barrier, which are either the various oxides or complexes bound with oxygen. Formed by the reaction with oxygen, the by-products such as Ti, Ta, Al, Si oxides, and various complexes, have dielectric characteristics like those of insu- lators.…”

Section: Resultsmentioning

confidence: 99%

“…Until now, many efforts have been conducted for the use of the oxygen diffusion barrier for MIM capacitors, including binary and ternary barriers ͑TiN, TaN, WN, TiAlN, TiSiN, TaSiN͒ developed for Al and Cu metallizations. [7][8][9][10][11] However, these are not always satisfactory because of barrier oxidation. The proposed barriers for metallization do not basically prevent both the diffusion and the reaction of oxygen at high temperatures because of their high reactivity and fast diffusivity.…”

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confidence: 99%

Feasibility of Nitrogen (or Oxygen)-Incorporated Ruthenium Titanium Ternary Diffusion Barrier Suggested by a New Design Concept for Future High-Density Memory Capacitors

Yoon¹,

Roh²

2002

A new design concept for diffusion barriers in high-density memory capacitors was suggested, and both the RuTiN (RTN) and the RuTiO (RTO) films, as sacrificial oxygen diffusion barriers, were proposed. The newly developed RTN and RTO barriers showed much lower sheet resistance, as reported by others, than various barriers including binary and ternary nitrides up to 800°C, without a large increase in resistance. For both the normalPt/RTN/TiSix/n++ normalpolynormalplug/n+ channel layer/Si and the normalPt/RTO/RTN/TiSix/n++ normalpolynormalplug/n+ channel layer/Si contact structures, contact resistance, the most important electrical parameter for the diffusion barrier in the bottom electrode structure of capacitors, exhibited as low as 5 kΩ, even after annealing up to 750°C. Moreover, when the RTN film was inserted as a glue layer between the bottom electrode Pt layer and the TiN barrier film in the chemical vapor deposited- false(normalBa,normalSrfalse)TiO3 simple stack-type structure, the thermal stability of the RTN glue layer was observed to be 150°C higher than that of the TiN glue layer. Correspondingly, new RTN and RTO films, as diffusion barriers for oxygen, are very promising materials for achieving the high-density capacitors. © 2002 The Electrochemical Society. All rights reserved.