2017
DOI: 10.7567/apex.10.095502
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Low-temperature (330 °C) crystallization and dopant activation of Ge thin films via AgSb-induced layer exchange: Operation of an n-channel polycrystalline Ge thin-film transistor

Abstract: Ge thin films have been prepared by layer-exchange metal-induced crystallization using AgSb alloy as a catalyst. Not only the crystallization of Ge, but also the incorporation of Sb atoms into the crystalline Ge layer and their activation have been realized during the process at a temperature as low as 330 °C. Thin-film transistors have been fabricated using the Ge thin films as channel layers and the operation of an n-channel transistor with an on/off ratio of over 300 has been demonstrated.

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Cited by 24 publications
(21 citation statements)
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References 15 publications
(20 reference statements)
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“…The performances of metal–oxide–semiconductor field-effect transistors (MOSFETs) based on a single-crystal Ge-on-insulator structure, formed using a single-crystal wafer 3 5 and/or high-temperature process (> 900 °C) 6 , 7 , surpassed those of Si MOSFETs. Low-temperature syntheses of Ge thin-film transistors (TFTs) have been achieved using conventional solid-phase crystallization (SPC) 8 11 , laser annealing 12 , seed layer technique 13 , and metal-induced crystallization 14 16 . Although these methods are potentially useful to expand the application of Ge, the crystallinity of the resulting polycrystalline Ge (poly-Ge) is still insufficient to increase the performances of Ge TFTs over those of Si MOSFETs.…”
Section: Introductionmentioning
confidence: 99%
“…The performances of metal–oxide–semiconductor field-effect transistors (MOSFETs) based on a single-crystal Ge-on-insulator structure, formed using a single-crystal wafer 3 5 and/or high-temperature process (> 900 °C) 6 , 7 , surpassed those of Si MOSFETs. Low-temperature syntheses of Ge thin-film transistors (TFTs) have been achieved using conventional solid-phase crystallization (SPC) 8 11 , laser annealing 12 , seed layer technique 13 , and metal-induced crystallization 14 16 . Although these methods are potentially useful to expand the application of Ge, the crystallinity of the resulting polycrystalline Ge (poly-Ge) is still insufficient to increase the performances of Ge TFTs over those of Si MOSFETs.…”
Section: Introductionmentioning
confidence: 99%
“…Many crystallization techniques have been developed, including solid-phase crystallization (SPC) 14 16 , laser annealing 17 , 18 , chemical vapor deposition 19 , 20 , flash-lamp annealing 21 , the seed layer technique 22 , and metal-induced crystallization 23 25 . By using these techniques, Ge-TFTs have been fabricated on thermally oxidized Si 21 , 26 , 27 , glass 28 31 , and even flexible substrates 22 , 32 . Since gate stack technology for Ge has developed sufficiently 8 , recent Ge-TFTs performance is limited by the properties of the poly-Ge thin film itself 21 , 22 , 26 32 .…”
Section: Introductionmentioning
confidence: 99%
“…[18][19][20][21][22][23][24][25][26][27][28] Ge-TFTs have been established using poly-Ge formed by solid-phase crystallization (SPC), [29][30][31] laser annealing, 32 seed layer technique, 33 and metal-induced crystallization. [34][35][36][37] However, poly-Ge generally has a high hole concentration due to defect-induced acceptors and a low hole mobility due to grain boundary (GB) scattering, 18,38 limiting the TFT performance.…”
Section: Introductionmentioning
confidence: 99%