Low-Stray Inductance Optimized Design for Power Circuit of SiC-MOSFET-Based Inverter

Abstract

High frequency converters based on silicon carbide (SiC) semiconductors are becoming popular, but due to the integration parameters, they are very likely to generate high voltage overshoot and large oscillation, which increase the voltage stress and cause EMC problems. To suppress the voltage overshoot and oscillation, the mechanism is firstly analyzed. Stray inductance is a culprit in causing these problems. To minimize the inductance of power circuit, this paper proposes optimization method including better design of bus-bar structure and parallel connection of snubber capacitors by means of model analysis and formula derivation. To evaluate the method, an inverter model and a prototype were built, several optimization schemes were compared by co-simulation and experimental tests. Experimental results show that the stray inductance of the new bus-bar is 6.4% of the traditional bus-bar. The loop-inductance can be reduced by 46.4% by connecting the capacitors in parallel, and the switching losses can be reduced by 30.8%. This analysis provides guidelines for a full SiC inverter design. INDEX TERMS SiC-MOSFET, low stray inductance, design method, double-pulse test.

Analysis of the Zero Overvoltage Switching Phenomenon

“…With the increasing usage of SiC transistors, different optimization methods are presented to reduce the parasitic inductances in power modules [6], [7]. An optimized busbar design between the DC-link and the power modules can reduce the effective parasitic inductance of the commutation cell [8], [9].…”

“…In the consideration of Fig. 2, the value of the step current source equals I TO,n determined by (8). With more than one operating point where ZOS is possible, the field of applications where the ZOS technique can be used is broadened.…”

Design method of wide‐band high‐current air‐core inductor EMI filter for high voltage DC power of motor inverter of electric vehicle

“…If DM magnetic ring is used as DM inductor, the higher operating current will saturate the magnetic core of DM magnetic ring, and the inductance will decrease rapidly, resulting in a small amount of EMI suppression. Therefore, DM choke and DM magnetic ring are not suitable for high voltage and high current systems [25,26]. Usually, when designing a traditional filter, DM inductance is not set separately, but the leakage inductance of the CM inductor is used as the equivalent DM inductance.…”

The Method of the SiC MOSFET Replacing the Si IGBT in the Traditional Power Electronics Converter without Redesigning the Main Circuit and the Driver Circuit

“…Kim et al [17] modeled the switching circuit of the SiC MOSFET converter considering the parasitic components and proposed an air core PCB transformer with a properly designed secondary side circuit inserted into the main circuit to dampen the oscillation. Chen et al [18], Yatsugi et al [19], Chuai et al [20] and Liu et al [21] also analyzed the huge oscillation problem of the whole circuit after the adoption of the SiC MOSFET and suppressed it by adding the RC snubber circuit in the main circuit. In Chen et al [18], the RC circuit was added between the DC bus-bar to dampen the oscillation and the corresponding parameters of the RC circuit were selected by the trial and error empirical method.…”

“…Chuai et al [20] analyzed the parasitic inductance in the circuit through the ANSYS Q3D software, and then designed the corresponding RC circuit to suppress the oscillation generated by the inductance. Through model analysis and formula derivation, Liu et al [21] proposed a better design of the bus-bar structure and parallel connection of the RC snubber, which decreased the stray inductance of the bus-bar by 93.6% and the total loop-inductance by 46.4%. Yatsugi et al [22] designed an external RLC resonator through analogy with passive parity-time (PT) symmetry, which was implemented in parallel to a bus-bar and has a better ringing suppression effect.…”