Low power synchronisation in wireless sensor networks via simple feedback controllers: The FLOPSYNC scheme

Leva, Alberto; Terraneo, Federico

doi:10.1109/acc.2013.6580617

Cited by 14 publications

(15 citation statements)

References 4 publications

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“…First, most of industrial communication networks are fast enough to fulfill the timing requirements for process control applications where the system dynamics are slow in comparison to networks transmission rates. Second, nowadays a great research effort is being spent to design protocols to significantly reduce the package's collision, main cause of variable delays in communication networks, [15]. Communication delays are represented by the terms exp(−t d s) in Figure 1.…”

Section: Problem Statementmentioning

confidence: 99%

A new method for tuning PI controllers with symmetric send-on-delta sampling strategy

Romero-Pérez

Sanchis

2016

ISA Transactions

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In this paper we present a new method for tuning PI controllers with Symmetric Send-On-Delta (SSOD) sampling strategy. First we analyze the conditions that produce oscillations in event based systems considering SSOD sampling strategy. The Describing Function is the tool used to address the problem. Once the conditions for oscillations are established, a new robustness to oscillation performance measure is introduced which entails with the concept of phase margin, one of the most traditional measures of relative stability in closed-loop control systems. Therefore, the application of the proposed robustness measure is easy and intuitive. Then the tuning method is developed to tune PI controllers to avoid the limit cycles. Because the method is based on the Describing Function, the effect of higher order harmonics has been studied to evaluate the validity of the proposal. Unlike some previous works concerning SSOD based PI, the results presented in this article are not restricted to specific model structures, instead they can be applied to a wide range of linear processes including dead-time, non-minimum phase and under-damped response. The tuning method is tested in simulations with a batch of models widely used in PI design methods testing. Furthermore, an actual laboratory scale application is presented to prove the feasibility of the proposal. Additionally, a Java application has been developed to aid in the design of SSOD based PI controllers according to the results presented in this paper.

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Section: Problem Statementmentioning

confidence: 99%

A new method for tuning PI controllers with symmetric send-on-delta sampling strategy

Romero-Pérez

Sanchis

2016

ISA Transactions

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“…First, most of industrial communication networks are fast enough to fulfil the timing requirements for process control applications where the system dynamics are slow in comparison to networks transmission rates. Second, nowadays a great research effort is being spent to design protocols to significantly reduce the packages collision, main cause of variable delays in communication networks, [10]. Communication delays are represented by the terms e −t d s on the right of the ZOH blocks in Figure 1.…”

Section: Problem Statementmentioning

confidence: 99%

A simple rule for tuning Event-Based PID controllers with Symmetric Send-On-Delta sampling strategy

Romero

Sanchis

Peñarrocha

2014

Proceedings of the 2014 IEEE Emerging Technology and Factory Automation (ETFA)

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In this paper we analyse the conditions that produce oscillations in event based PID controllers. A Symmetric SendOn-Delta scheme (SSOD) is assumed, and the describing function is the tool used to address the problem. Once the conditions for oscillations are established, a new robustness to oscillations performance measure is introduced. Then a very simple and intuitive rule of thumb is given about how to tune PID controllers to avoid the limit cycles. The rule presented here entails with the classical concept of phase margin, providing the key to design SSOD based PID by using continuous PID tuning methods. The proposed ideas are tested in simulations with a batch of models widely used in PID design methods testing.

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“…We build on FLOPSYNC [9], our first attempt to introduce control theory for synchronisation. FLOPSYNC is based on a proportional-integral (PI) controller and can only compensate for a constant or slowly varying clock skew.…”

Section: Introductionmentioning

confidence: 99%

FLOPSYNC-2: Efficient Monotonic Clock Synchronisation

Terraneo

Rinaldi

Maggio

et al. 2014

2014 IEEE Real-Time Systems Symposium

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Time synchronisation is crucial for distributed systems, and particularly for Wireless Sensor Networks (WSNs), where each node is executing concurrent operations to achieve a real-time objective. However, synchronisation is quite difficult to achieve in WSNs, due to the unpredictable deployment conditions and to physical effects like thermal stress, that cause drifts in the local node clocks. As a result, state-of-the-art synchronisation schemes do not guarantee monotonicity of the nodes clock, or are relying on external hardware assistance. In this paper we present FLOPSYNC-2, a scheme to synchronise the clocks of multiple nodes in a WSN, requiring no additional hardware, and based on the application of control-theoretical principles. The scheme guarantees low overhead, low power consumption and synchronisation with clock monotonicity.We propose an implementation of FLOPSYNC-2 on top of the microcontroller operating system Miosix, and prove the validity of our claims with several-days-long experiments on an eight-hop network. The experimental results show that the average clock difference among nodes is limited to a hundred of ns, with a sub-μs standard deviation. By introducing a suitable power model, we also prove that synchronisation is achieved with a sub-μA consumption overhead.

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Low power synchronisation in wireless sensor networks via simple feedback controllers: The FLOPSYNC scheme

Cited by 14 publications

References 4 publications

A new method for tuning PI controllers with symmetric send-on-delta sampling strategy

A new method for tuning PI controllers with symmetric send-on-delta sampling strategy

A simple rule for tuning Event-Based PID controllers with Symmetric Send-On-Delta sampling strategy

FLOPSYNC-2: Efficient Monotonic Clock Synchronisation

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