Low-Power Single Bitline Load Sense Amplifier for DRAM
Chenghu Dai,
Yixiao Lu,
Wenjuan Lu
et al.
Abstract:With the significant growth in modern computing systems, dynamic random access memory (DRAM) has become a power/performance/energy bottleneck in data-intensive applications. Both the power management mechanism and downscaling method face decreasing performance or difficulties in the smaller footprint of the DRAM capacitor. Since optimizing the circuit of sense amplifier (SA) is an efficient method to reduce energy consumption, we propose two single bitline load sense amplifier (SBLSA) circuits, i.e., a redunda… Show more
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