Low-power read circuit with self-adjusted column pulse width for diode-switch resistive RAMs

Abstract

Abstract:In this letter, a new read circuit with self-adjusted column pulse width is proposed for low-power applications of resistive memories. In the conventional read circuit, its column pulse width is determined by the worst-case value of the cell resistance variations thereby the pulse width being longer than required when the resistance variations are not in the worst case. In this paper, to alleviate power loss due to this long column pulse width, the column pulse width is selfadjusted according to the resistance variations thus unnecessary power loss being able to be reduced significantly. The power consumption during the read is expected to be less by 28.6% than the conventional circuit when the SET resistance is its mean value as large as 2 kΩ. The Monte Carlo simulation also shows that the power consumption of the proposed circuit is reduced by 25% in average than the conventional.

Compact Verilog-A model of phase-change RAM transient behaviors for multi-level applications

“…The third and fourth pulses are for the partial states. Here, the PCRAM simulation was performed with the practical PCRAM read and write circuits [26][27][28]. Figure 4(c) shows the case when the pulse width is varied from 100 to 200 ns.…”

Memristor models and circuits for controlling Process-V<inf>DD</inf>-Temperature variations

“…These variations can cause large power consumption when the memristors are in read and write operation. Recently, read and write circuits with self-adjustment were proposed to improve the problems which are due to the large PVT variations of memristors [7,8]. Figure 8 shows the schematic of write circuit of memristors.…”

“…From Figure 9( d), we can know that the adjusted write circuit can reduce the current consumption in memristor writing by 77% than the conventional write circuit. The concept of the self-adjustment can also be applied to the memristor read circuit [7].…”

“…In this paper, we will apply a concept of self-adjustment to memristor read and write circuits for controlling the PVT variations of memristors. By doing so, we could reduce the overall power consumption signifIcantly in both read and write operations of memristors [7,8]. …”