Low-power Programmable Processor for Fast Fourier Transform Based on Transport Triggered Architecture
Jakub Žádník,
Jarmo Takala
Abstract:This paper describes a low-power processor tailored for fast Fourier transform computations where transport triggering template is exploited. The processor is software-programmable while retaining an energy-efficiency comparable to existing fixed-function implementations. The power savings are achieved by compressing the computation kernel into one instruction word. The word is stored in an instruction loop buffer, which is more power-efficient than regular instruction memory storage. The processor supports al… Show more
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