2016 IEEE Asian Solid-State Circuits Conference (A-Sscc) 2016
DOI: 10.1109/asscc.2016.7844148
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Low power FSK transceiver using ADPLL with direct modulation and integrated SPDT for BLE application

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Cited by 8 publications
(5 citation statements)
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“…It offers a smaller size by eliminating the requirement of big size capacitors in the filter, process, temperature and voltage (PVT) variations independence, and flexibility in programming and control. [2], [3] Beginning of ADPLL started in 1980. [4] The studies reveal that ADPLL outperforms classical PLLs and have more significance towards communication systems as well as consumer applications.…”
Section: Introductionmentioning
confidence: 99%
“…It offers a smaller size by eliminating the requirement of big size capacitors in the filter, process, temperature and voltage (PVT) variations independence, and flexibility in programming and control. [2], [3] Beginning of ADPLL started in 1980. [4] The studies reveal that ADPLL outperforms classical PLLs and have more significance towards communication systems as well as consumer applications.…”
Section: Introductionmentioning
confidence: 99%
“…However, this paper proposes a high-gain, low-noise, low-power RF-FE that can only use an inductor-less low noise transconductance amplifier (LNTA) structure with LO of 25% duty ratio. Because the BBA operates at low power, the characteristics of the filter are sensitive to process, voltage, and temperature variations [7]. In this paper, we propose a Filter Tuning Circuit (FTC) to keep the cut-off frequency and bandwidth of the filter constant.…”
Section: Introductionmentioning
confidence: 99%
“…External components such as inductor and capacitor for impedance matching, baluns, and a transmitter (TX) as well as a receiver (RX) switch can increase system cost and be area consuming on the PCB. Therefore, it is beneficial to design the BLE RF transceiver that can interface directly with a single-ended 50-Ω antenna minimizing external components [7]. In this work, Single-Pole Double-Throw (SPDT), internal matching components, and Power Management Unit (PMU) such as the DC-DC buck converter and Low Drop-Outs (LDO) are integrated to reduce system cost.…”
Section: Introductionmentioning
confidence: 99%
“…Recent works show a strong tendency in using a passive topology to implement the downconversion Mixer [7,11,33,43], reinforcing the benefits of applying it to ULP designs.…”
Section: Topology Choicementioning
confidence: 95%
“…Cascode common-source LNA with inductive source degeneration and LC load.Source: AuthorDespite the advantages of the presented topology, inverter-based topologies are also found among recent ULP implementations, thriving for better operating conditions in ULV conditions[7,33,40,43]. Albeit being a better choice for biasing in ULV condition, the inverter-based topologies show a large bandwidth frequency response compared to the cascode common-source presented.…”
mentioning
confidence: 99%