Low-power embedded ReRAM technology for IoT applications

Ueki, Makoto; Takeuchi, Kazuhiro; Yamamoto, Takashi; Tanabe, A.; Ikarashi, Nobuyuki; Saitoh, M.; Nagumo, Toshiya; Sunamura, H.; Narihiro, M.; Uejima, K.; Masuzaki, Koji; Furutake, N.; Saitô, Shôzô; Yabe, Y.; Mitsuiki, Akira; Takeda, Koichi; Hase, T.; Hayashi, Y.

doi:10.1109/vlsit.2015.7223640

Cited by 34 publications

(20 citation statements)

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“…Another advantage for 1T1R structure is that the design and fabrication for transistors is quite mature. Thus this structure is mostly adopted by researchers . The challenge for the integration of 1S1R arrays lies in acquiring high‐performance selectors, which have been extensively studied recently .…”

Section: Memristive Crossbar Arraymentioning

confidence: 99%

Memristive Devices and Networks for Brain‐Inspired Computing

Zhang

et al. 2019

Physica Rapid Research Ltrs

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As the era of big data approaches, conventional digital computers face increasing difficulties in performance and power efficiency due to their von Neumann architecture. As a result, there is recently a tremendous upsurge of investigations on brain-inspired neuromorphic hardware with high parallelism and improved efficiency. Memristors are considered as promising building blocks for the realization of artificial synapses and neurons and can therefore be utilized to construct hardware neural networks. Here, a review is provided on existing approaches for the implementation of artificial synapses and neurons based on memristive devices; and the respective advantages and disadvantages of these approaches are evaluated. This is followed by a discussion of hardware accelerators and neuromorphic computing systems that exploit the parallel, in-memory and analog characteristics of memristive crossbar arrays as well as the intrinsic dynamics of memristors. Finally, the outstanding challenges are addressed that have not yet been resolved in the present studies, and future advances are discussed that might be needed for building intelligent and energy efficient neuromorphic systems.

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Section: Memristive Crossbar Arraymentioning

confidence: 99%

Memristive Devices and Networks for Brain‐Inspired Computing

Zhang

et al. 2019

Physica Rapid Research Ltrs

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“…A 98μA P/E current is achieved due to the simple cell and array structure, and the ASPC technique. P/E energy is 0.07mJ/8kB at a Tj of 175°C and almost equivalent to that of a ReRAM macro for consumer use [4]. A die micrograph and macro features are shown in Figure 7.6.7.…”

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confidence: 95%

7.6 A 90nm embedded 1T-MONOS flash macro for automotive applications with 0.07mJ/8kB rewrite energy and endurance over 100M cycles under Tj of 175°C

Mitani

Matsubara

Yoshida

et al. 2016

2016 IEEE International Solid-State Circuits Conference (ISSCC)

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The computerization of automotive control has expanded the application range of micro controller units (MCUs). A high-end engine-control unit (ECU) requires high-performance Flash MCUs, which integrate high-speed CMOS logic and large high-performance embedded Flash memories (eFlash) [1,2]. There are also broad markets for motor control MCUs: used to control actuators in parts such as seats, windows, and mirrors. In order to integrate analog circuits to control the high voltage (HV) drivers in these parts, those MCUs have been manufactured in Flashless process, and external EEPROM chips are being used. EEPROM chips work as "learning memories" which store the calibration data to optimize analog circuit performance in the field. Replacement of external EEPROM chips by eFlash, resulting in less additional process cost and higher rewrite endurance, is a requirement for more elaborate learning at a higher data sampling rate. In addition to automotive grade reliability under extremely harsh temperature conditions, low power consumption is also a strong requirement as the number of MCUs used in motor control systems is increasing.This paper presents a one-transistor MONOS (1T-MONOS) eFlash macro for automotive applications, with four key features: 1) A 1T-MONOS cell with a low implementation cost, high reliability, and low power consumption thanks to FN tunneling program and erase (P/E) operations; 2) Read-disturb-free array architecture to ensure automotive grade reliability; 3) Adaptable slope pulse control (ASPC) technique that can achieve over 100M cycles of rewrite endurance at a 175°C junction temperature (Tj), and that can reduce total power consumption down to 0.07mJ/8kB using a 98μA P/E current; 4) 1T-MONOS-based low-power system-control scheme suitable for green car applications with a 99% power reduction.Figure 7.6.1 shows the 1T-MONOS cell, it is a simple 1T cell with charge-trapping ONO film and inherits cost merits typical for this type of a cell: less additional mask layers and process steps are needed to integrate memory cell formation modules into baseline process. Compared to a 2-transistor (2T) MONOS cell [3] with the same cell size, the 1T-MONOS cell stores more charges thanks to its wider ONO film area. Figure 7.6.1 also summarizes the voltage conditions required for each operation. P/E operations are based on FN tunneling, resulting in lowpower consumption. To adopt FN tunneling for P/E operations the ONO film thickness should be thinner, which is critical for read disturb. A 2T-MONOS cell is free from read disturb because the select transistor (SG) suppresses channel leakage even with a depleted erase cell. In contrast, the Vth of a conventional 1T-MONOS cell is set higher than 0V to suppress channel leakage of unselected cells in read operation. This is why conventional 1T-MONOS cell needs positive MG voltage in read operation and the selected one suffers from read disturb. Even worse, a 1T-MONOS cell with thinner ONO film becomes more vulnerable to read disturbs, that can be fatal in automotive u...

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“…Resistive switching effects in metal oxides were originally discovered in the 1960s [6,7,8], then later studied for potential application in nonvolatile memory devices [9,10,11,12]. Today, the research on RRAM for electronic storage has been mostly transferred to industrial development of storage-class memory [13] and embedded memory for Internet of Things (IoT) [14]. On the other hand, RRAM devices have stimulated an increasing interest for the development of artificial synapses in neural networks.…”

Section: Introductionmentioning

confidence: 99%

Brain-Inspired Memristive Neural Networks for Unsupervised Learning

Ielmini

Milo

2019

Handbook of Memristor Networks

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Memristive devices, such as resistive switching memory (RRAM) and phase change memory (PCM), show variable resistance which can mimic the synaptic plasticity in the human brain. This fascinating analogy has provided the inspiration for many recent research advances, involving memristive devices and their use as artificial electronics synapses in neuromorphic circuits with learning capability. In particular, RRAM-based artificial synapses are extremely promising in terms of area efficiency, low power consumption, and flexibility of design which pave the way for spiking neural networks that perform and behave like the human brain. This chapter will review the state of the art about the design and development of memristive neural networks for unsupervised learning. First, the optimization of RRAM devices for synaptic applications will be discussed, and a novel RRAM device with improved resistance window and controllability of resistance will be introduced. Then, a hybrid CMOS/memristive synaptic circuit will be shown to carry out learning tasks via the spike-timing dependent plasticity (STDP), which is one of the learning rules in biological synapses. Finally, the neural networks based on RRAM synapses will be reviewed, covering both feedforward networks and recurrent networks. In both cases, the network displays unsupervised learning of input patterns, which can be stored, recognized, or even reconstructed by the network, thus highlighting the wealth of potential promising applications for memristive networks with synaptic plasticity.

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Low-power embedded ReRAM technology for IoT applications

Cited by 34 publications

References 0 publications

Memristive Devices and Networks for Brain‐Inspired Computing

Memristive Devices and Networks for Brain‐Inspired Computing

7.6 A 90nm embedded 1T-MONOS flash macro for automotive applications with 0.07mJ/8kB rewrite energy and endurance over 100M cycles under Tj of 175°C

Brain-Inspired Memristive Neural Networks for Unsupervised Learning

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