Low‐power digital latch circuit using magnetic logic device

Abstract

The in-plane magnetic logic device is a spin-based technology which offers several advantages over charged-based devices such as nonvolatility, ultra-low power and greater integration density. A novel low-power digital latch circuit is proposed by using various shaped nanomagnets. Specifically, a pipelined clocking layout is effectively constructed to ensure sequential and reliable operation. The simulation results show that the magnetic logic latch performs well. The proposed circuit is promising in building future ultra-low power magnetic memories, and may inspire new applications (i.e. magnetic arithmetic circuits).