2017 International Conference on Smart Technologies for Smart Nation (SmartTechCon) 2017
DOI: 10.1109/smarttechcon.2017.8358471
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Low power ASIC implementation of signed and unsigned wallace-tree with vedic multiplier using compressors

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Cited by 6 publications
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“…Meanwhile, ASICs architecture is easier and faster to design since it only need fewer layers to fabricate and it contain fixed arrangement of integrated circuit for a particular use. Unfortunately, the obvious disadvantage of ASICs is no programmable resources are provided which not allow them to be reconstructed [9].…”
Section: Introductionmentioning
confidence: 99%
“…Meanwhile, ASICs architecture is easier and faster to design since it only need fewer layers to fabricate and it contain fixed arrangement of integrated circuit for a particular use. Unfortunately, the obvious disadvantage of ASICs is no programmable resources are provided which not allow them to be reconstructed [9].…”
Section: Introductionmentioning
confidence: 99%