Low-power architectural trade-offs in a VLSI implementation of an adaptive hearing aid algorithm

Buergin, F.; Carbognani, F.; Hediger, Martin; Meier, Hektor; Meyer-Piening, R.; Santschi, Rafael; Kaeslin, Hubert; Felber, N.; Fichtner, W.

doi:10.1145/1146909.1147054

Proceedings of the 43rd Annual Conference on Design Automation - DAC '06 2006

DOI: 10.1145/1146909.1147054

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Low-power architectural trade-offs in a VLSI implementation of an adaptive hearing aid algorithm

F. Buergin

F. Carbognani

Martin Hediger

et al.

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Low-power architectural trade-offs in a VLSI implementation of an adaptive hearing aid algorithm

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References 6 publications

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