Low-power and robust ternary SRAM cell with improved noise margin in CNTFET technology

Abstract

In this paper, a carbon nanotube field-effect transistor (CNTFET) based low power and robust ternary SRAM (TSRAM) cell with enhanced static noise margin (SNM) has been proposed. The proposed cell uses a low-power cell core and a stack of 2 CNTFETs to discharge the read bit line (RBL) to ground, unlike the previous SRAM designs which use read buffers or transmission gates (TG) to alter the voltage levels on the RBL. The proposed TSRAM cell has been simulated relentlessly, using the Stanford 32 nm CNTFET technology mode file with Synopsis HSPICE tool under various operating conditions. Unlike other designs, the cross-coupled ternary inverters used as the cell core in the proposed TSRAM show higher gain and steep curves in the transition region mitigating the static power of the cell. The simulation results exhibit improvements in performance parameters like power consumption, energy, noise margins, and reliability. At 0.9 V supply voltage, the proposed TSRAM cell offers 52.44% and 43.17% reduction in write and read static power, a PDP reduction of 35.29% in comparison, and a 36.36% improvement in SNM compared to best designs under investigation. Also, the proposed TSRAM design shows higher robustness compared to other designs.

Design analysis of a low-power, high-speed 8 T SRAM cell using dual-threshold CNTFETs

“…However, recent advancements in technology have led to the development of potential substitutes for CMOS technology. Carbon nanotubes (CNT) offer several advantages, including high on-off current ratio (I ON /I OFF ) [5], absence of mobility degradation [6], ballistic transport [7,8], less sensitivity to process variations [9], ultra-thin body [10], and variation of bandgap within a single material [11]. The CNT-based field-effect transistor (CNTFET) technology has also progressed, with several proposed CNTFETs such as ferroelectric CNTFETs [12], pin CNTFETs using metal-ferroelectric-metal gate switching [13], ferroelectric junction less CNTFETs [14], and negative capacitance CNTFETs [15].…”