Low Overhead Hardware-Assisted Virtual Machine Analysis and Profiling

Sharma, Suchakrapani Datt; Nemati, Hani; Bastien, Geneviève; Dagenais, Michel R.

doi:10.1109/glocomw.2016.7848953

Cited by 10 publications

(5 citation statements)

References 14 publications

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“…Nemati [11], [12] proposed a new approach to trace guests virtual CPU states, in any virtualization layer, tracing only the host without accessing VMs. Sharma [13], used a hardware tracing monitoring-based approach to generate hypervisor metrics and exposing virtualization overhead. This method involves continuous host access, which may not be possible in some cases.…”

Section: Hypervisor Monitoringmentioning

confidence: 99%

Hypertracing: Tracing Through Virtualization Layers

Benbachir

Dagenais

2021

IEEE Trans. Cloud Comput.

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Cloud computing enables on-demand access to remote computing resources. It provides dynamic scalability and elasticity with a low upfront cost. As the adoption of this computing model is rapidly growing, this increases the system complexity, since virtual machines (VMs) running on multiple virtualization layers become very difficult to monitor without interfering with their performance. In this paper, we present hypertracing, a novel method for tracing VMs by using various paravirtualization techniques, enabling efficient monitoring across virtualization boundaries. Hypertracing is a monitoring infrastructure that facilitates seamless trace sharing among host and guests. Our toolchain can detect latencies and their root causes within VMs, even for boot-up and shutdown sequences, whereas existing tools fail to handle these cases. We propose a new hypervisor optimization, for handling efficient nested paravirtualization, which allows hypertracing to be enabled in any nested environment without triggering VM exit multiplication. This is a significant improvement over current monitoring tools, with their large I/O overhead associated with activating monitoring within each virtualization layer.

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Section: Hypervisor Monitoringmentioning

confidence: 99%

Hypertracing: Tracing Through Virtualization Layers

Benbachir

Dagenais

2021

IEEE Trans. Cloud Comput.

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“…Thalheim et al used Intel PT for improving security and dependability in software by presenting a data parallel provenance algorithm. Analysis of virtual machines using host‐only Intel PT hardware traces has also been explored recently …”

Section: Literature Reviewmentioning

confidence: 99%

“…Analysis of virtual machines using host-only Intel PT hardware traces has also been explored recently. 19 The most common candidate for runtime code generation are the process virtual machines and bytecode interpreters that use JIT compilation techniques to improve execution speed. The eBPF bytecode interpreter, originally developed for packet filtering in the OS kernel, has been recently improved to generate optimized and verified JIT code for execution.…”

Section: Literature Reviewmentioning

confidence: 99%

Hardware trace reconstruction of runtime compiled code

Sharma

Dagenais

2018

Softw Pract Exp

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Summary Hardware tracing has emerged as a low‐cost technique to analyze systems at a very fine granularity, thus mitigating the need for software‐only trace approaches for performance analysis. State‐of‐the‐art trace hardware on modern Intel and ARM processors allows recording change‐of‐flow instructions in executable binaries, such as branches, for off‐line reconstruction. This conventional userspace–based trace reconstruction, however, is not robust enough in the common scenarios where runtime code is being generated, compiled, and executed. We therefore propose a novel kernel‐assisted mechanism called FlowJIT to reconstruct hardware traces with a low overhead of around 1.3 μs per code page modification event. We further show the efficacy or our technique with the help of 2 illustrative usecases that cover the JIT compiled code scenario and a same‐page instruction modification scenario. Our implementation has been open sourced as a patch for the Linux kernel.

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“…A vCPU state detection algorithm based on host hypervisor is proposed in [7], [8], and [9]. They built different states for the running processes and threads.…”

Section: Related Workmentioning

confidence: 99%

Wait analysis of virtual machines using host kernel tracing

Nemati

Bastieny

Dagenaisz

2018

2018 IEEE International Conference on Consumer Electronics (ICCE)

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An agent-less method to understand virtual machines (VMs) behavior its evolution during the VM life-cycle is an essential task for IaaS provider. It allows the IaaS provider to better scale the VMs resources by properly allocating the physical resources. On the other hand, because of privacy, security, ease of deployment and execution overhead issues, the method presented limits its data collection to the physical host level, without internal access to the VMs.We propose a host-based, precise method to recover wait states for the virtual CPUs (vCPUs) of a given VM. The Wait Analysis Algorithm (W2A) computes the state of vCPUs through the host kernel trace. The state of vCPUs is displayed in an interactive trace viewer (TraceCompass) for further inspection. Our proposed VM trace analysis algorithm has been open-sourced for further enhancements and to the benefit of other developers. Our new technique is being evaluated with representative workloads, generated by different benchmarking tools. These approaches are based on host hypervisor tracing, which brings a lower overhead (around 0.03%) as compared to other approaches.

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Low Overhead Hardware-Assisted Virtual Machine Analysis and Profiling

Cited by 10 publications

References 14 publications

Hypertracing: Tracing Through Virtualization Layers

Hypertracing: Tracing Through Virtualization Layers

Hardware trace reconstruction of runtime compiled code

Wait analysis of virtual machines using host kernel tracing

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