Low-noise, fast frame-rate InGaAs 320 x 256 FPA for hyperspectral applications

Bogget, Urbain Van; Horebeek, Guido Van; Bentell, Jonas; Verbeke, Peet; Colin, Thierry

doi:10.1117/12.818948

Cited by 11 publications

(11 citation statements)

References 7 publications

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“…After subtracting correlated noise, the residual RMS noise was 6.5 ± 2.6 µV in connected MEA1k pixels, suggesting that noise levels could be further reduced by shielding. (A) Electrical model of the recording configuration (depicted for a capacitive transimpedance amplifier derived from IR sensors (Vermeiren et al, 2009)). The axial resistance of the metal core microwires (RAxial) is low (<300 Ω/cm).…”

Section: Signal-to-noisementioning

confidence: 99%

CHIME: CMOS-hosted in-vivo microelectrodes for massively scalable neuronal recordings

Kollo

Racz

Hanna

et al. 2019

Preprint

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SummaryMammalian brains consist of 10s of millions to 100s of billions of neurons operating at millisecond time scales, of which current recording techniques only capture a tiny fraction. Recording techniques capable of sampling neural activity at such temporal resolution have been difficult to scale: The most intensively studied mammalian neuronal networks, such as the neocortex, show layered architecture, where the optimal recording technology samples densely over large areas. However, the need for application-specific designs as well as the mismatch between the threedimensional architecture of the brain and largely two-dimensional microfabrication techniques profoundly limits both neurophysiological research and neural prosthetics.Here, we propose a novel strategy for scalable neuronal recording by combining bundles of glass-ensheathed microwires with large-scale amplifier arrays derived from commercial CMOS of in-vitro MEA systems or high-speed infrared cameras. High signal-to-noise ratio (<20 μV RMS noise floor, SNR up to 25) is achieved due to the high conductivity of core metals in glass-ensheathed microwires allowing for ultrathin metal cores (down to <1 μm) and negligible stray capacitance. Multi-step electrochemical modification of the tip enables ultra-low access impedance with minimal geometric area and largely independent of core diameter. We show that microwire size can be reduced to virtually eliminate damage to the blood-brain-barrier upon insertion and demonstrate that microwire arrays can stably record single unit activity.Combining microwire bundles and CMOS arrays allows for a highly scalable neuronal recording approach, linking the progress of electrical neuronal recording to the rapid scaling of silicon microfabrication. The modular design of the system allows for custom arrangement of recording sites. Our approach of employing bundles of minimally invasive, highly insulated and functionalized microwires to lift a 2-dimensional CMOS architecture into the 3rd dimension can be translated to other CMOS arrays such as electrical stimulation devices.

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Section: Signal-to-noisementioning

confidence: 99%

CHIME: CMOS-hosted in-vivo microelectrodes for massively scalable neuronal recordings

Kollo

Racz

Hanna

et al. 2019

Preprint

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“…This interface stage is ideally suited for general purpose imaging or spectroscopy with typical integration times in the range of [10 µsec -100 msec]; then the CTIA yields adjustable sensitivity independent from the detector capacitance; low dark current due to the low detector bias and finally low lag when switching between high and low photon flux situations or vice versa [3][4][5][6].…”

Section: Focal Plane Design Considerationsmentioning

confidence: 99%

COUGAR: a liquid nitrogen cooled InGaAs camera for astronomy and electro-luminescence

et al. 2014

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A SWIR FPA was designed and manufactured with 640*512 pixels, 20 µm pitch and InGaAs detectors for electroluminescence characterization and astronomical applications in the [0.9 -1.55 µm] range. The FPA is mounted in a liquid nitrogen dewar and is operated by a low noise frontend electronics.One of the biggest problem in designing sensors and cameras for electro-luminescence measurements is the autoillumination of the detectors by the readout circuit. Besides of proper shielding of the detectors, the ROIC shall be optimized for minimal electrical activity during the integration time of the very-weak signals coming from the circuit under test. For this reason a SFD (or Source Follower per Detector) architecture (like in the Hawaii sensor) was selected, resulting in a background limited performance of the detector.The pixel has a (somewhat arbitrary) full well capacity of 400 000 e -and a sensitivity of 2.17 µV/e -.The dark signal is app. 1 e-/pixel/sec and with the appropriate Fowler sampling the dark noise lowers below 5 erms . The power consumption of the circuit is limited 2 mW, allowing more than 24 hours of operation on less than 1 l of liquid nitrogen. The FPA is equipped with 4 outputs (optional readout on one single channel) and is capable of achieving 3 frames per second. Due to the non-destructive readout it is possible to determine in a dynamic way the optimal integration time for each observation.The Cougar camera is equipped with ultra-low noise power supply and bias lines; the electronics contain also a 24 bit AD converter to fully exploit the sensitivity of the FPA and the camera.

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“…The noise of the ROIC directly affects the performances of InGaAs FPA, such as dynamic range, detectivity and so on. Especially for 2-Dimension ROIC array of which pixel size is small, the ROIC could barely be designed with small-size transistor, integration capacitance, sampling capacitor which bring into larger noise [1][2][3][4].…”

Section: Introductionmentioning

confidence: 99%

A low noise low power 512×256 ROIC for extended wavelength InGaAs FPA

Huang

Chen

et al. 2015

Image Sensing Technologies: Materials, Devices, Systems, and Applications II

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A low noise low power 512×256 readout integrated circuit (ROIC) based on Capacitance Trans-impedance Amplifier (CTIA) was designed in this paper. The ROIC with 30μm pixel-pitch and 70 fF integrated capacitance as normal structure and test structure capacitance from 5 to 60 fF, was fabricated in 0.5μm DPTM CMOS process. The results showed that output voltage was larger than 2.0V and power consumption was about 150mW, output ROIC noise was about 3.6E-4V which equivalent noise was 160e-, and the test structure noise was from 20e-to 140 e-. Compared the readout noises in Integration Then Readout (ITR) mode and Integration While Readout (IWR) mode, it indicated that in IWR mode, readout noise comes mainly from both integration capacitance and sampling capacitance, while in ITR mode, readout noise comes mostly from sampling capacitance. Finally the ROIC was flip-chip bonded with Indium bumps to extended wavelength InGaAs detectors with cutoff wavelength 2.5μm at 200K. The peak detectivity exceeded 5E11cmHz 1/2 /w with 70nA/cm 2 dark current density at 200K.

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Low-noise, fast frame-rate InGaAs 320 x 256 FPA for hyperspectral applications

Cited by 11 publications

References 7 publications

CHIME: CMOS-hosted in-vivo microelectrodes for massively scalable neuronal recordings

CHIME: CMOS-hosted in-vivo microelectrodes for massively scalable neuronal recordings

COUGAR: a liquid nitrogen cooled InGaAs camera for astronomy and electro-luminescence

A low noise low power 512×256 ROIC for extended wavelength InGaAs FPA

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