Low Noise Amplifier Design for IoT Wireless Communication Systems

Abstract

In the era of Internet of Things (IoT), the Internet has evolved from a simple Internet function of web information access to intelligent functions of identification, position, monitoring, and management of things. Devices in the IoT must transmit data between the devices and equipment connecting to cloud. As a fog computing architecture is established proximally at the local ends of the IoT, the data transmission volume and transmission delay can be effectively reduced. IoT wireless communication is one of the essential items for complete data transmission between the devices and on-line equipment. This paper proposes the low noise amplifier (LNA) design that can be applied to the RF front-end receiver of a 2.45-GHz wireless communication system for IoT applications. The LNA is required to have characteristics of low noise factor and high signal gain in order to amplify weak signals received by the antenna. In this study, the design of 2.45-GHz LNA adopts an architecture of power-constrained simultaneous noise and input matching on the basis of the 0.18-μm CMOS process technology in order to achieve simultaneous noise and input matching at low power conditions. Both the architectures of push-pull and forward substrate bias are also utilized. The LNA demonstrates the characteristics of low noise factor, high gain, and good 1-dB gain compression. The LNA shows good potential for IoT wireless communication system applications.

Analytical Performance of Low Noise Amplifier Using Single-Stage Configuration for ADS-B Receiver

“…Research related to the implementation of LNA in the medical field was also carried out [11], which low noise operational amplifier dedicated to implantable biomedical applications is introduced using EKV Model to set the bias currents of the transistors. An LNA design has also been applied to the RF front-end receiver of a 2.45-GHz wireless communication system for IoT applications using the design proposed in [12], with the LNA adopting an architecture of power-constrained simultaneous noise and input matching based on the 0.18-μm CMOS process technology to achieve simultaneous noise and input matching at low power conditions. Another previous research regarding LNA was carried out with the design of low noise amplifier circuit in the L band frequency using a 0.18 nm CMOS transistor technology, which consists of two transistor stages for increase circuit linearization, creating an integrative matching network for system stability [13].…”