Low-latency double-precision floating-point division for FPGAs

Abstract

Abstract-With growing FPGA capacities, applications requiring more intensive use of floating-point arithmetic become feasible candidates for acceleration using reconfigurable logic. Still among the more uncommon operations, however, are fast double-precision divider units. Since our application domain (acceleration of custom-compiled convex solvers) heavily relies on these blocks, we have implemented low-latency dividers based on the Goldschmidt algorithm that are accurate up to 1 bit of least precision (1-ULP). On Virtex-6 devices, our units operate at 200 MHz and significantly outperform other state-of-the-art 1-ULP dividers. We evaluate our blocks both stand-alone, as well as on the application-level when used for the high-level synthesis of the convex solver cores.

Review of Basic Classes of Dividers Based on Division Algorithm

“…Goldschmidt division algorithm (GDA) is one of the convergence-based algorithms used for performing division, similar to that of the Newton-Rapson algorithm [53], [105]- [109]. Like the Newton-Rapson algorithm, GDA also offers quadratic convergence of quotient, but there is a difference between them.…”

“…Goldschmidt division algorithm originates from the Taylor-Maclaurin series of 1 (x + 1) [109]. The basic operation of the Goldschmidt division algorithm can be expressed as [53], [105], [106], [108]…”

“…To overcome this problem, one basic observation comes in handy that when y n reaches to 1then (2-y n ) also reaches to 1, which can be advantageous for implementation by reducing area and performance at a time [109]. Later Harrison and Markstein found that the actual Goldschmidt division algorithm can be expressed as recursive equations that use multiplication and square operations in each iteration [105], [106], [108]. Such type of applications of Goldschmidt division algorithm is termed as modified Goldschmidt division algorithm and useful for software library implementation [109].…”

Novel data dependent divider circuit block implementation for complex division and area critical applications

“…class dividers compute a quotient bit based on the estimation or approximation of series expansion functions, such as the Newton-Rapson algorithm 31,32 , Goldschmidt algorithm 11,[33][34][35][36] , Taylor series algorithm 11,[37][38][39][40] . This approach utilizes multiplication instead of subtraction operations, reducing the number of required iterations, and can generate multiple quotient digits in one iteration with low latency, but the area required for a multiplier is higher than that of an adder or subtractor.…”