2017
DOI: 10.1049/iet-cds.2016.0342
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Low‐jitter DLL applied for two‐segment TDC

Abstract: A low-jitter delay-locked loop (DLL) for high-resolution time-to-digital converter (TDC) is proposed in this study. The generated high accurate and low-jitter outputs with uniformly distributed multiphase clocks directly from the voltage-controlled delay line (VCDL) in DLL are applied to two-segment TDC. For reducing the static phase offset in locked state, the charge pump with interior feedback loop is used to achieve a better current matching between the charging and discharging currents. An improved phase d… Show more

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Cited by 6 publications
(2 citation statements)
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“…This causes the charge pump will charges and discharges simultaneously when the DLL is in locked state. Static phase offset will occur due to the current mismatch of charge pump [4]. So the charge pump requires additional circuitry to improve current matching, which increases design complexity [5,6].…”
Section: Introductionmentioning
confidence: 99%
“…This causes the charge pump will charges and discharges simultaneously when the DLL is in locked state. Static phase offset will occur due to the current mismatch of charge pump [4]. So the charge pump requires additional circuitry to improve current matching, which increases design complexity [5,6].…”
Section: Introductionmentioning
confidence: 99%
“…Time-to-digital converters (TDCs) are used in various engineering applications for fine time intervals measurements. For instance, TDCs are used in positron emission tomography [1], fluorescence lifetime imaging microscopy [2] or to build all digital phase-locked loops [3]. TDCs are also used in some measurement instruments such as oscilloscopes and logic analysers.…”
Section: Introductionmentioning
confidence: 99%