2015 IEEE Applied Power Electronics Conference and Exposition (APEC) 2015
DOI: 10.1109/apec.2015.7104711
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Low-inductance snubber arrays for high-power, high-bandwidth switch-mode amplifiers

Abstract: This paper presents a low inductance snubber design incorporating a damped DC bus capacitance and multiple RC+RCD cells arranged in two arrays. The design suppresses transient over-voltage peaks seen at the switching transitions in hard-switched, high-frequency switch-mode circuits which are created by an unavoidable interaction between circuit parasitic inductances, IGBT turn-off current slopes and free-wheeling diode reverse recovery currents. The array arrangement allows the use of small surface-mount, ultr… Show more

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Cited by 4 publications
(3 citation statements)
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“…Oftentimes the gate bias voltage was increased by about 0.1 volt to obtain minimum harmonics. In the latter case, the power output would drop by about 5-10% [10][11][12].…”
Section: Switchingmosfetscomparedmentioning
confidence: 97%
“…Oftentimes the gate bias voltage was increased by about 0.1 volt to obtain minimum harmonics. In the latter case, the power output would drop by about 5-10% [10][11][12].…”
Section: Switchingmosfetscomparedmentioning
confidence: 97%
“…The In order to achieve high di/dt, the stray inductance of the test circuit must be minimized. Hence, a laminated bus-bar structure was designed to connect the capacitors [19][20][21] . The charging resistor (R C ) was used to charge up the 133 μF capacitor bank (C bank ) to the DC bus voltage.…”
Section: Pulsed Power Applicationmentioning
confidence: 99%
“…High-power Class-D amplifiers (CDAs) have been studied for the applications that require high switching frequency and high-power handling capability, such as industrial vibration test systems, electromagnetic interference test systems, and current control systems for magnetic resonance imaging scanners [1], [2]. As one of research hot-spots, Class-D amplifiers are widely investigated.…”
Section: Introductionmentioning
confidence: 99%