2020
DOI: 10.1109/ted.2019.2954131
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Low-Current-Density Magnetic Tunnel Junctions for STT-RAM Application Using MgO$_{{x}}$ N$_{\text{1}-{x}}\,\,({x}=\text{0.57}$ ) Tunnel Barrier

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Cited by 11 publications
(1 citation statement)
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“…This growing interest in using CIM for resolving the shortcomings of DNNs is driven by two main factors: (1) the potential of the CIM paradigm to process data where it resides to reduce the large performance and energy overheads of data movement and (2) the analog operational properties of these nanoscale emerging technologies (e.g., memristors) that intrinsically support efficient Vector-Matrix-Multiplication (VMM), multiple of which are used to implement a Matrix-Matrix-Multiplication (MMM) that is the most dominant operation in DNNs. However, the memristor-based CIM solutions for basecalling can greatly degrade the DNN inference accuracy due to (1) the limited quantization levels supported by memristor devices [27,111] and (2) non-idealities of memristive devices and circuits used to adopt memristor-based memory arrays, such as sneak paths [48,118] and the non-linearity of peripheral circuitry [58,83,147]. To propose viable solutions for accelerating the large-scale DNN-based basecallers, these aspects must be considered at all computing stack layers, i.e., application, architecture, and device.…”
Section: Introductionmentioning
confidence: 99%
“…This growing interest in using CIM for resolving the shortcomings of DNNs is driven by two main factors: (1) the potential of the CIM paradigm to process data where it resides to reduce the large performance and energy overheads of data movement and (2) the analog operational properties of these nanoscale emerging technologies (e.g., memristors) that intrinsically support efficient Vector-Matrix-Multiplication (VMM), multiple of which are used to implement a Matrix-Matrix-Multiplication (MMM) that is the most dominant operation in DNNs. However, the memristor-based CIM solutions for basecalling can greatly degrade the DNN inference accuracy due to (1) the limited quantization levels supported by memristor devices [27,111] and (2) non-idealities of memristive devices and circuits used to adopt memristor-based memory arrays, such as sneak paths [48,118] and the non-linearity of peripheral circuitry [58,83,147]. To propose viable solutions for accelerating the large-scale DNN-based basecallers, these aspects must be considered at all computing stack layers, i.e., application, architecture, and device.…”
Section: Introductionmentioning
confidence: 99%