Low-Cost Thin Glass Interposers as a Superior Alternative to Silicon and Organic Interposers for Packaging of 3-D ICs

Sukumaran, Vijay; Bandyopadhyay, Tapobrata; Sundaram, Venky; Tummala, Rao

doi:10.1109/tcpmt.2012.2204392

Cited by 195 publications

(59 citation statements)

References 18 publications

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“…1,2 Recently, glass has gained attention as a candidate interposer material. [3][4][5][6] The CTE of borosilicate glass, 3.2, is reasonably close to that of Si, 2.9, and a wide range of CTE's is available by changing the glass composition. 3 Methods have been developed for producing and handling glass in thin, flexible roll formats offering the prospect of low cost, and a wider range of size options than Si.…”

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confidence: 81%

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Superconformal Filling of High Aspect Ratio through Glass Vias (TGV) for Interposer Applications Using TNBT and NTBC Additives

Ogutu

Fey

Dimitrov

2015

J. Electrochem. Soc.

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Cu superconformal filling of through glass vias (TGV) of aspect ratios (AR) 6:1 and 10:1 for glass interposer applications is achieved by DC electroplating in the presence of the additives tetranitroblue tetrazolium Cl − (TNBT) and nitroblue tetrazolium Cl − (NTBC) in acidic CuSO 4 / Cl − formulations. Filling takes place by the so-called 'butterfly' mechanism that nucleates hemispherical or X-shaped Cu plugs in the centers of TGV's while keeping the thickness on external surfaces low. Holes of AR 6:1 are filled in 3 h at 2.5 mA.cm −2 , using a bath composed of 40 ppm TNBT, 80 ppm Cl − , 0.88 M CuSO 4 , and 0.3 M CH 3 COOH under stagnant conditions. Increasing [TNBT] to 80 ppm and [Cl − ] to 120 ppm in the presence of 0.3 M CH 3 COOH allows filling of 10:1 AR holes in 12.5 h at 1.0 mA.cm −2 while maintaining thin surface plating. In the case of NTBC, 6:1 holes are filled in 4-5 h at 2.5-4.0 mA.cm −2 , and 10:1 holes are filled in 12-13 h at 1.0 to 1.5 mA.cm −2 in a slowly stirred bath containing 0.88 M CuSO 4 , 80 ppm Cl − , 0.6 M H 2 SO 4, and 45-50 ppm NTBC. Optimization of bath composition is necessary to avoid void-formation in the holes. Effects of composition on overvoltage and Cu surface topography are discussed.

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confidence: 81%

“…The CuSO 4 and Cl − concentrations are the same in all cases, and the additives are present at 40 ppm. The acid-free TNBT bath and TNBT/H 2 SO 4 bath represent two extremes.…”

Section: Superfilling Of Ar 6 and Ar 10 Holes Using Tnbt-earlier Wormentioning

confidence: 94%

Superconformal Filling of High Aspect Ratio through Glass Vias (TGV) for Interposer Applications Using TNBT and NTBC Additives

Ogutu

Fey

Dimitrov

2015

J. Electrochem. Soc.

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“…The interposers aim to replace the traditional printed circuit board (PCB) laminate or ceramic technologies for the sake of extreme miniaturization and performance. This interposer can be made of ultrathin silicon, glass, or even organic substrate [8,9]. However, a silicon substrate cannot be utilized as a medium for signal transmission, as the interconnects on the silicon substrate suffer from substrate losses caused by the penetration of the electric and magnetic field.…”

Section: Introductionmentioning

confidence: 99%

Fabrication and characterization of low-cost ultrathin flexible polyimide interposer

Huang

Chen

Lin

et al. 2015

Microelectronics Reliability

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“…Glass packaging started at Georgia Tech and many other R&D groups as a lower cost and higher performance alternative to silicon interposers, due to the low loss and large panel availability of ultra-thin glass [1]. The Georgia Tech team began to demonstrate such an interposer with its industry partners addressing major barriers that include the handling of large, ultra-thin glass panels, forming large number of ultrasmall through vias at small pitch, metallization of these small copper vias without defects and with good adhesion, forming 2-5 micron RDL wiring layers with bump pitch at 20-50 microns, assembly of chips to these brittle substrates, and improving its thermal conductivity.…”

Section: Introductionmentioning

confidence: 99%

“…A schematic of the glass BGA package that can be SMT attached to FR-4 motherboard, is shown in Figure 1. Previously, the authors have reported individual building block technologies such as through via hole formation, metallization and reliability, electrical characterization of glass substrates and initial board-level assembly and reliability [1,2]. This paper, for the first time, integrates all the glass package building blocks into the first thin glass BGA package demonstration.…”

Section: Introductionmentioning

confidence: 99%

First demonstration of a surface mountable, ultra-thin glass BGA package for smart mobile logic devices

Sato

Seki

Takagi

et al. 2014

2014 IEEE 64th Electronic Components and Technology Conference (ECTC)

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This paper presents the first demonstration of an ultra-thin glass BGA package that is assembled on to mother board with standard SMT technology. Such a package has many new advances that include ultra-thin glass, high speed through via hole formation and copper metallization, double-side RDL wiring with advanced 3 micron ground rules, and Cu-SnAg microbump assembly of a 10mm silicon test die. Glass, as a package, overcomes the shortcomings of organic packages in bump pitch, CTE mismatch to Si and warpage and silicon interposers in electrical performance and cost. Glass packages are being developed to manufacture both as wafers for improved performance over Si and as panels to improve bump pitch over organic packages. Glass, therefore, is not just a high performance and low volume technology, like silicon interposers, but a pervasive package technology with lower cost, higher performance and thinner than silicon and organic packages. Glass has compelling benefits in thickness and I/O pitch reduction and reliability for one of the highest volume applications, namely, the packaging of high I/O logic devices for smart mobile systems. This paper represents a paradigm shift in ultra-thin packages using large glass panels for future smart mobile and high performance devices, and the first demonstration of 100um thin glass packages with 50-80um chip-level I/O pitch and 18mm x 18mm body size surface mount assembly at 400um pitch. IntroductionGlass packaging started at Georgia Tech and many other R&D groups as a lower cost and higher performance alternative to silicon interposers, due to the low loss and large panel availability of ultra-thin glass [1]. The Georgia Tech team began to demonstrate such an interposer with its industry partners addressing major barriers that include the handling of large, ultra-thin glass panels, forming large number of ultrasmall through vias at small pitch, metallization of these small copper vias without defects and with good adhesion, forming 2-5 micron RDL wiring layers with bump pitch at 20-50 microns, assembly of chips to these brittle substrates, and improving its thermal conductivity. It became clear that glass can be a pervasive platform technology that is both a high performance and very low cost technology. As the glass packaging technology matures and is applied to high volume applications, it should be at the same or lower cost than organic packaging. Glass simplifies the material manufacturing compared to laminates, since FR-4 or low CTE laminates require four different materials and process technologies such as glass fiber, glass and ceramic fillers,

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Low-Cost Thin Glass Interposers as a Superior Alternative to Silicon and Organic Interposers for Packaging of 3-D ICs

Cited by 195 publications

References 18 publications

Superconformal Filling of High Aspect Ratio through Glass Vias (TGV) for Interposer Applications Using TNBT and NTBC Additives

Superconformal Filling of High Aspect Ratio through Glass Vias (TGV) for Interposer Applications Using TNBT and NTBC Additives

Fabrication and characterization of low-cost ultrathin flexible polyimide interposer

First demonstration of a surface mountable, ultra-thin glass BGA package for smart mobile logic devices

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