Low-Cost Memory Fault Tolerance for IoT Devices

Abstract

IoT devices need reliable hardware at low cost. It is challenging to efficiently cope with both hard and soft faults in embedded scratchpad memories. To address this problem, we propose a two-step approach: FaultLink and Software-Defined Error-Localizing Codes (SDELC). FaultLink avoids hard faults found during testing by generating a custom-tailored application binary image for each individual chip. During software deployment-time, FaultLink optimally packs small sections of program code and data into fault-free segments of the memory address space and generates a custom linker script for a lazy-linking procedure. During run-time, SDELC deals with unpredictable soft faults via novel and inexpensive Ultra-Lightweight Error-Localizing Codes (UL-ELCs). These require fewer parity bits than single-error-correcting Hamming codes. Yet our UL-ELCs are more powerful than basic single-error-detecting parity: they localize single-bit errors to a specific chunk of a codeword. SDELC then heuristically recovers from these localized errors using a small embedded C library that exploits observable side information (SI) about the application’s memory contents. SI can be in the form of redundant data (value locality), legal/illegal instructions, etc. Our combined FaultLink+SDELC approach improves min-VDD by up to 440 mV and correctly recovers from up to 90% (70%) of random single-bit soft faults in data (instructions) with just three parity bits per 32-bit word.

Uma Revisão Sistemática da Literatura Sobre Tolerância a Falhas em Internet das Coisas

“…Uma abordagem de baixo custo para monitorar erros em dispositivos e classificá-los de acordo com a quantidade de erros que exibem para fins de manutençãoé apresentada em [31]. Já em [32] há uma abordagem dedicada para confiabilidade em memórias: ao identificar as falhas, uma mapa de memóriá e criado para evitar acesso a essas regiões. A identificação de sensores falhosé o tema principal do trabalho em [33].…”

Lightweight Software-Defined Error Correction for Memories

“…Unlike the general-purpose Software-Defined ECC (SDECC), SDELC focuses on heuristic error recovery that is suitable for microcontroller-class IoT devices. Details of the concepts discussed in this section can be found in the work by Gottscho et al [13].…”

“…Next, the probability of each valid message is estimated using a small precomputed lookup table that contains the relative frequency that each instruction appears. The relative frequencies of legal instructions in most applications follow power-law distribution [13]. This is used to favor more common instructions.…”

The Deep Learning Solutions on Lossless Compression Methods for Alleviating Data Load on IoT Nodes in Smart Cities

“…Scratchpad Memory (SPM) & Non-Volatile Memory Express (NVMe) memory types were developed in order to hold small items of data for rapid retrieval in IoT devices [ 39 ]. SPMs are software-controlled and require additional programmer effort [ 40 ], while NVMe enables the code to be executed directly. No code has to be copied to the Random Access Memory (RAM), which will reduce the boot-up time as well [ 21 ].…”