Low cost error tolerant motion estimation for H.264/AVC standard

Abstract

Motion estimation is the most important module in any video encoder from quality point of view. Although in the presence of faults the final generated bit-stream is compatible with the standard but the quality degradation and decreasing of compression ratio is considerable. In this paper a low cost error tolerant structure for motion estimation is proposed. Simulation results show that our proposed method imposes smaller area and power overhead with small effect on quality.

A Low Power and Error Tolerant Structure for Motion Estimation Core in H. 264/AVC Standard

“…In this method, all levels of SAD are not equipped with fault detection and correction methods and only levels 5-9 are fault tolerant (based on results in [16]). …”

“…As it is described in [16], SAD module has a tree structure with 9 levels. The tree structure of SAD causes some difficulties for multiple fault tolerant modeling.…”

“…In [16], a RT level error tolerant structure was presented for the motion estimation core. Also a mapping for hierarchical structure of Sum of Absolute Differences module (SAD) to a linear structure was presented in [16] (Fig.…”

“…Also a mapping for hierarchical structure of Sum of Absolute Differences module (SAD) to a linear structure was presented in [16] (Fig. 1).…”

“…Based on the hierarchical structure of the SAD, it was showed that the six higher levels of the SAD do not need to be fault tolerated and in remaining levels, all bits of each adder do not need to be fault tolerated. In [16], only one tolerated fault in each adder was analyzed. If more faults occur in one adder the incorrect data will be passed in the SAD structure.…”