2013 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) 2013
DOI: 10.1109/hst.2013.6581570
|View full text |Cite
|
Sign up to set email alerts
|

Low-cost and area-efficient FPGA implementations of lattice-based cryptography

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3
1
1

Citation Types

0
52
0

Year Published

2014
2014
2023
2023

Publication Types

Select...
4
2
1

Relationship

0
7

Authors

Journals

citations
Cited by 72 publications
(52 citation statements)
references
References 4 publications
0
52
0
Order By: Relevance
“…However, this approach leads to so called "bubbles" during the inverse transformation as not enough memory ports are available to feed the two inputs and to write back the two outputs of the butterfly and thus every second cycle the PE is unused. As a consequence, the implementation proposed in [APS13] requires 2n(log 2 (n)) + 7n cycles 7 which is more than the ≈ 3 2 (n log n) + 5.5n of our implementation for common choices of n. As an example, for n = 512 the implementation of Aysu et al needs 11,264 cycles while our work requires ≈ 9,728 cycles.…”
Section: Review Of Follow-up Work On Polynomial Multiplicationmentioning
confidence: 84%
See 3 more Smart Citations
“…However, this approach leads to so called "bubbles" during the inverse transformation as not enough memory ports are available to feed the two inputs and to write back the two outputs of the butterfly and thus every second cycle the PE is unused. As a consequence, the implementation proposed in [APS13] requires 2n(log 2 (n)) + 7n cycles 7 which is more than the ≈ 3 2 (n log n) + 5.5n of our implementation for common choices of n. As an example, for n = 512 the implementation of Aysu et al needs 11,264 cycles while our work requires ≈ 9,728 cycles.…”
Section: Review Of Follow-up Work On Polynomial Multiplicationmentioning
confidence: 84%
“…The design consists of an NTT multiplier with access to a register file and offers instructions for storing, loading, adding, and sampling of polynomials from a Gaussian distribution. The proposed multiplier design builds on top of the work by Aysu et al [APS13]. The most important improvement is a technique to remove the bottleneck when accessing the BRAM holding polynomial coefficients where two coefficients are stored pairwise in one memory address.…”
Section: Polynomial Multiplier By Chen Et Al [Cmvmentioning
confidence: 99%
See 2 more Smart Citations
“…The evaluation representation, also referred to as polynomial Chinese Remainder Transform (CRT) representation [57], computes the values of polynomial a(x) at all primitivem-th roots of unity modulo q, i.e., b i = a(ζ i ) mod q for i ∈ (Z/mZ) * . These cyclotomic rings support fast polynomial multiplication by transforming the polynomials from coefficient to evaluation representation in O(n log n) time using Fermat Theoretic Transform (FTT) [58] and component-wise multiplication. Lattice sampling works with n-dimensional discrete Gaussian distributions over lattice Λ ⊂ R n denoted as D Λ,c,σ , where c ∈ R n is the center and σ is the distribution parameter.…”
Section: B Cyclotomic Ringsmentioning
confidence: 99%