Low area ASIC implementation of LUT–CLA–QTL architecture for cryptography applications

Balamanikandan, A.; Krishnamoorthi, K.

doi:10.1007/s11276-019-02017-3

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Low area ASIC implementation of LUT–CLA–QTL architecture for cryptography applications

Cited by 4 publications

References 14 publications

A Low Area FPGA Implementation of Reversible Gate Encryption with Heterogeneous Key Generation

A Low Area FPGA Implementation of Reversible Gate Encryption with Heterogeneous Key Generation

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