Loop alignment for memory accesses optimization

Fraboulet, Antoine; Huard, Guillaume; Mignotte, Anne

doi:10.1109/isss.1999.814263

Cited by 32 publications

(23 citation statements)

References 11 publications

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“…Strout et al [70] present a technique for determining the minimum amount of memory required for executing a perfectly nested loop with a set of constant-distance dependence vectors. Fraboulet et al [16] use loop alignment to reduce memory requirement between adjacent loops by formulating the one-dimensional version of the problem as a network flow problem. Song [66] and Song et al [67], [68] present a different network flow formulation of the memory reduction problem and they include a simple model of cache misses as well.…”

Section: Related Workmentioning

confidence: 99%

Synthesis of High-Performance Parallel Programs for a Class of ab Initio Quantum Chemistry Models

et al. 2005

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This paper provides an overview of a program synthesis system for a class of quantum chemistry computations. These computations are expressible as a set of tensor contractions and arise in electronic structure modeling. The input to the system is a a high-level specification of the computation, from which the system can synthesize high-performance parallel code tailored to the characteristics of the target architecture. Several components of the synthesis system are described, focusing on performance optimization issues that they address.

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Section: Related Workmentioning

confidence: 99%

Synthesis of High-Performance Parallel Programs for a Class of ab Initio Quantum Chemistry Models

et al. 2005

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“…• For each edge e = v i , v j ∈ E 2 , we also make it an edge in G 2 and mark it by the distance c ij s T . • If f * (e) > 0, e = v i , v j ∈ E 2 , we add an edge v j , v i and mark it by the distance − c ij s T in G 2 .…”

Section: Solving Problem 3 Via Problemmentioning

confidence: 99%

A Polynomial-Time Algorithm for Memory Space Reduction

Song

Wang

2005

Int J Parallel Prog

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Reducing memory space requirement is important to many applications. For data-intensive applications, it may help avoid executing the program out-ofcore. For high-performance computing, memory space reduction may improve the cache hit rate as well as performance. For embedded systems, it can reduce the memory requirement, the memory latency and the energy consumption. This paper investigates program transformations which a compiler can use to reduce the memory space required for storing program data. In particular, the paper uses integer programming to model the problem of combining loop shifting, loop fusion and array contraction to minimize the data memory required to execute a collection of multi-level loop nests. The integer programming problem is then reduced to an equivalent network flow problem which can be solved in polynomial time.

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“…Even nowadays, locality optimization is an area of ongoing research. In [12], loops are aligned so that the time between two successive accesses to the same memory location (temporal locality) is minimized. A graph based optimization strategy is used in [13] to cluster array references in loops with spatial or temporal reuse.…”

Section: Related Workmentioning

confidence: 99%

Combined Data Partitioning and Loop Nest Splitting for Energy Consumption Minimization

Falk

Verma

2004

Software and Compilers for Embedded Systems

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Abstract. For mobile embedded systems, the energy consumption is a limiting factor because of today's battery capacities. Besides the processor, memory accesses consume a high amount of energy. The use of additional less power hungry memories like caches or scratchpads is thus common. This paper presents a combined approach for energy consumption minimization consisting of two complementary and phase-coupled optimizations, viz. data partitioning and loop nest splitting. In a first step, data partitioning partitions large arrays found in typical embedded software into smaller ones which are placed onto an on-chip scratchpad memory. Although being effective w. r. t. energy dissipation, this optimization adds overhead to the code since the correct part of a partitioned array has to be selected at runtime. Therefore, the control flow is optimized as a second step in our framework. In this phase, loop nests containing if-statements are split using genetic algorithms leading to minimized if-statement executions. However, loop nest splitting leads to an increase in code size and can potentially annul the program layout achieved by the first step. Consequently, the proposed approach iteratively applies these optimizations till a local optimum is found. The proposed framework of combined memory and control flow optimization leads to considerable energy savings for a representative set of typical embedded software routines. Using an accurate energy model for the ARM7 processor, energy savings between 20.3% and 43.3% were measured.

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Loop alignment for memory accesses optimization

Abstract: Abstract

Cited by 32 publications

References 11 publications

Synthesis of High-Performance Parallel Programs for a Class of ab Initio Quantum Chemistry Models

Synthesis of High-Performance Parallel Programs for a Class of ab Initio Quantum Chemistry Models

A Polynomial-Time Algorithm for Memory Space Reduction

Combined Data Partitioning and Loop Nest Splitting for Energy Consumption Minimization

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