Look-ahead circuit for CSD-code carry determination

Herrfeld, A.; Hentschke, S.

doi:10.1049/el:19950334

Cited by 17 publications

(5 citation statements)

References 5 publications

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“…There are several studies [4,5,6] treating CSD recoding from 2's complement binary number representation. In order to recode an SD number to the corresponding CSD form according to those theories, the SD number must be converted to 2's complement binary number as the fast step, and then to the CSD form.…”

Section: Introductionmentioning

confidence: 99%

Another Implementation of Efficient Recoding Circuit for Signed Digit to Residue Canonical Signed Digit on Modulo 2<sup>n</sup>-1

Tanaka

2019

AMM

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Section: Introductionmentioning

confidence: 99%

Another Implementation of Efficient Recoding Circuit for Signed Digit to Residue Canonical Signed Digit on Modulo 2<sup>n</sup>-1

Tanaka

2019

AMM

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“…Traditional binary-to-CSD converter is designed recursively with a carry propagation adder, which is slow and energy-inefficient [4]. In order to improve the speed, a look-ahead method is adopted to the binary-to-CSD converter [5,6], which trades off higher speed with more energy consumption and inefficient VLSI implementations. To take advantage of the property that there's no adjacent nonzero digits existed in the CSD coding, a bypass signal is used in the converter to boost its performance with less area overhead [7].…”

Section: Introductionmentioning

confidence: 99%

A fast and energy efficient binary-to-pseudo CSD converter

Zhang

et al. 2015

2015 IEEE International Symposium on Circuits and Systems (ISCAS)

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The canonical signed digit (CSD) coding is widely used in digital arithmetic operations due to its property that there is no adjacent nonzero digits in the encoded numbers. However, the benefits of the CSD coding may be faded because of the recursive conversion process from the binary representations. This paper presents a novel pseudo CSD coding method, which takes the merits of CSD, while simplifies the conventional conversion process. The simulation results indicate that the proposed converter can achieve at least 31.8% speed improvement and 42.9% energy reduction for a 16-bit binary operand at 1.2V in a 0.13-μm CMOS technology. It could run even faster than the competitors when the operand length increases.

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“…Conventional approaches [1], [6], [7] to the binary to CSD transformation use an intermediate binary carry…”

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confidence: 99%

Fast and VLSI efficient binary-to-CSD encoder using bypass signal

2011

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The generation of a canonical signed digit representation from a binary representation is revisited. Based on the property that each nonzero digit is surrounded by a zero digit, a hardware-efficient conversion method using bypass instead of carry propagation is proposed. The proposed method requires less area per digit and the required bypass signal can be generated or propagated with only a single NOR gate. It is shown that the proposed converter outperforms previous converters and a look-ahead circuitry to speed up the generation of bypass signals is also proposed.Original Publication:M Faust, Oscar Gustafsson and C-H Chang, Fast and VLSI efficient binary-to-CSD encoder using bypass signal, 2011, ELECTRONICS LETTERS, (47), 1, 18-19.http://dx.doi.org/10.1049/el.2010.3055Copyright: Iethttp://www.theiet.org

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Look-ahead circuit for CSD-code carry determination

Cited by 17 publications

References 5 publications

Another Implementation of Efficient Recoding Circuit for Signed Digit to Residue Canonical Signed Digit on Modulo 2<sup>n</sup>-1

Another Implementation of Efficient Recoding Circuit for Signed Digit to Residue Canonical Signed Digit on Modulo 2<sup>n</sup>-1

A fast and energy efficient binary-to-pseudo CSD converter

Fast and VLSI efficient binary-to-CSD encoder using bypass signal

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