Logic operation‐based Design for Testability method and parallel test algorithm for 1T1R crossbar

Abstract

Among resistive random access memory (RRAM) architectures, one transistor one memristor (1T1R) crossbar is the most fledged one. For 1T1R crossbar, a logic operation-based Design for Testability and parallel test algorithm, which is an improvement of March C*-1T1R test algorithm, are proposed. The pass-fail fault dictionary of the proposed test algorithm is analysed. Analytical results show that the proposed test algorithm can detect all the modelled faults caused by the parametric variation of memristors and traditional RAM. Compared with March MOM, March C* and March C*-1T1R, the test time of the proposed test algorithm is reduced with a little area overhead for a large size crossbar.

Accelerating RRAM Testing with a Low-cost Computation-in-Memory based DFT

“…Efforts offering modified march test algorithms that involve specific sequences of sequential memory (read, write) operations to optimize test time [7,8] or improve coverage [9][10][11][12] fail in the detection of unique RRAM faults [5] and typically DFT schemes are introduced to further enable improved fault coverage (FC) and/or optimized This work was supported by the EU H2020 grant "DAIS" with funding from the ECSEL Joint Undertaking under grant agreement No 101007273. test time. However, existing dedicated DFTs are expensive in terms of hardware [13], optimistic regarding variations and lack implementations [14], impractical due to large voltage requirements [6,15,16] and exhibit functional issues due to to the reliance on sneak-paths [7,17]. DFTs that target high FC typically involve slow, probabilistic write operations [6,[18][19][20][21][22].…”

The influence of temperature on set voltage for different high resistance state in 1T1R devices

“…According to previous research, the RRAM is suitable for being computing devices because of its high operation speed. [15][16][17][18][19] Due to the continuous computing, the temperature of the devices will rise. However, previous research indicates that the characteristics of RRAM will be affected by temperature.…”