Lockstep Dual-Core ARM A9: Implementation and Resilience Analysis Under Heavy Ion-Induced Soft Errors

Oliveira, Ádria Barros de; Rodrigues, Gennaro S.; Kastensmidt, Fernanda Lima; Added, N.; Macchione, Eduardo Luiz Augusto; Aguiar, Vitor A. P.; Medina, N. H.; Silveira, M. A. G.

doi:10.1109/tns.2018.2852606

Cited by 35 publications

(26 citation statements)

References 19 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…A good idea to avoid internal hardware modifications is to use COTS (Commercial Off-The-Shelf) processors which some works propose [5], [12], [13], [14], [16]. The drawback seems the limitation of flexibility this choice imposes.…”

Section: Discussionmentioning

confidence: 99%

“…The drawback seems the limitation of flexibility this choice imposes. Some works [16] cite problems with handling interruptions that could be avoided with little modifications in the hardware platform.…”

Section: Discussionmentioning

confidence: 99%

“…Some works explicitly avoid using caches [8], [16] since if they are enabled, the lockstep process becomes more complicated. This is necessary for the context saving step, and a cache flush is also required during the rollback, which may lead to a higher impact on performance overhead.…”

Section: Discussionmentioning

confidence: 99%

“…Only a couple of works [15], [16] carry out actual radiation tests. In the first case, the proposed circuit was capable of recovery from injected faults.…”

Section: Discussionmentioning

confidence: 99%

“…In [16] a proposal for rollback/recovery is proposed for FPGAs containing ARM A9 processors. The proposal is a dual-core lockstep (DCLS) fault-tolerance technique to mitigate radiation-induced faults in embedded processors.…”

Section: Lockstep Techniquesmentioning

confidence: 99%

See 4 more Smart Citations

Survey of Lockstep based Mitigation Techniques for Soft Errors in Embedded Systems

Wächter

Kasap

Zhai

et al. 2019

2019 11th Computer Science and Electronic Engineering (CEEC)

View full text Add to dashboard Cite

Soft errors are one of the significant design technology challenges at smaller technology nodes and especially in radiation enviro nments. This paper presents a particular class of approaches to provide reliability against radiation-induced soft errors. The paper provides a review of the lockstep mechanism across different levels of design abstraction: processor design, architectural level, and the software level. This work explores techniques providing modifications in the processor pipeline, techniques allied with FPGA dynamic reconfiguration strategies and different types of spatial redundancy.

show abstract

Section: Discussionmentioning

confidence: 99%

Section: Discussionmentioning

confidence: 99%

Section: Discussionmentioning

confidence: 99%

“…Only a couple of works [15], [16] carry out actual radiation tests. In the first case, the proposed circuit was capable of recovery from injected faults.…”

Section: Discussionmentioning

confidence: 99%

Section: Lockstep Techniquesmentioning

confidence: 99%

See 3 more Smart Citations