Local Clock Glitching Fault Injection with Application to the ASCON Cipher

Abstract

Lightweight ciphers such as ASCON facilitate ease of implementation as well as provide better performance over conventional ciphers, thus making it suitable for resource-constrained devices. However, hardware implementations of these ciphers are vulnerable to a multitude of physical attacks (such as fault injections) requiring dedicated countermeasures thus causing a negative impact on security, performance and power consumption. Modeling and understanding the impact of these attacks on cipher operations and end users is mandatory. Further, detection and mitigation of such fault injection attacks is challenging due to the interconnected nature of cipher design, coupled with the varying number of possible design choices and with the forced trade-offs that need to be done in order to implement expensive countermeasures at the lowest possible cost. In this work, we aim to model a fault injection attack on ASCON and analyze its impact on FPGA. In particular, we implement the ASCON cipher and propose a methodology for fault injection attacks using synchronous clock glitching by Digital Clock Manager (DCM) introducing a novel approach of locality, which can be exploited to emulate general delay faults on focused parts of the design, such those induced by pulsed EM injections.

A Low-Cost Methodology for EM Fault Emulation on FPGA

“…Despite the complexity of the actual interaction between the EM pulse and the gates, it is generally accepted that EM faults can be approximated by timing faults in a first instance [13]. This assumption was thus adopted in [14], where the authors have shown the feasibility of using internal primitives of an FPGA to create clock glitch at a local level. However, their approach was limited to just evaluate the impact of the modification on resource usage and on performance, without any actual analysis of the faults that could be injected.…”