Load-Line Regulation With Estimated Load-Current Feedforward: Application to Microprocessor Voltage Regulators

Abstract

Abstract-A consistent framework for load-line regulation design is presented, applicable to microprocessor voltage regulators (VRs) using either electrolytic or ceramic output capacitors. With conventional feedback control, the loop bandwidth is limited by stability constraints linked to the switching frequency. The output capacitor has to be chosen sufficiently large to meet the stability requirement. Load-current feedforward can extend the useful bandwidth beyond that imposed by feedback stability constraints. With load-current feedforward, the size of the output capacitor can be reduced, since it is determined solely by large-signal and switchingripple considerations which are shown to be less constraining than the feedback stability requirement. This work points to the feasibility of microprocessor VR implementations using only a small number of ceramic output capacitors, while running at sub-megahertz switching frequencies.

Adaptive Output Current FeedforwardControl in VR Applications

“…This expression was reported in [4] for voltage mode control and including the circuit parameters is approximately equal to…”

“…However, this is not feasible for ceramic capacitors, which have a much lower ESR. For this reason, the concept of generalized load-line was introduced [4]. The generalized load-line acknowledges the physical limitations of the system, creating a dynamic output impedance reference Z ref that is equal to R LL at low frequencies, and the ESR of the output capacitor at high frequencies.…”

“…This approach is particularly useful in VR applications, in which the output current has large and fast transients that need to be tracked, while the bandwidth of the feedback loop is limited by the switching frequency of the converter through a stability constraint [4]. Output current feedforward had been reported earlier as a way of improving the output impedance of a DC-DC converter [5], [6].…”

An integrated four-phase buck converter delivering 1A/mm² with 700ps controller delay and network-on-chip load in 45-nm SOI

“…C =r C C), the optimal load-transient response is achieved when the output voltage (v OUT ) follows a dynamic load-line [8] …”

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“…The second stage in the architecture typically carries out a DC side load regulation function. Here the goal might be as simple as providing galvanic isolation, and a stable noise-free DC voltage, or more complex functions such as load-line regulation [5] [6] or the generation of high-frequency AC [1] [3].…”