LMS-based digital background mismatch calibration technique for SAR ADC

Wan, Jing; Song, Shida; Liang, Yuhua

doi:10.1016/j.mejo.2023.105767

Cited by 1 publication

(1 citation statement)

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“…Therefore, analog-to-digital conver-ters (ADC) inevitably become bridges connecting the analog and digital domains [1]. Compared with other ADC structures, successive approximation analog-todigital converters (SAR ADC) have the advantages of simplicity, low power consumption, small area, and ease of integration [2] [3]. As electronic products continue to develop towards ease of use, portability, and long endurance, SAR ADC with this characteristic are gradually showing significant advantages.…”

Section: Introductionmentioning

confidence: 99%

A 5MS/s 12-Bit Successive Approximation Analog-to-Digital Converter

Li,

Cao,

Wang

et al. 2023

OJAppS

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With the continuous development of science and technology, digital signal processing is more and more widely used in various fields. Among them, the analog-to-digital converter (ADC) is one of the key components to convert analog signals to digital signals. As a common type of ADC, 12-bit sequential approximation analog-to-digital converter (SAR ADC) has attracted extensive attention for its performance and application. This paper aims to conduct in-depth research and analysis of 12-bit SAR ADC to meet the growing demands of digital signal processing. This article designs a 12-bit, successive approximation analog-to-digital converter (SAR ADC) with a sampling rate of 5 MS/s. The overall circuit adopts a fully differential structure, with key modules including DAC capacitor array, comparator, and control logic. According to the DAC circuit in this paper, a fully differential capacitor DAC array structure is proposed to reduce the area of layout DAC. The comparator uses a digital dynamic comparator to improve the ADC conversion speed. The chip is designed based on the SMIC180 nm CMOS process. The simulation results show that when the sampling rate is 5 MS/s, the effective bit of SAR ADC is 11.92 bit, the SNR is 74.62 dB, and the SFDR is 89.24 dB.

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Section: Introductionmentioning

confidence: 99%