Abstract. Model checking is emerging as a practical tool for automated debugging of complex reactive systems such as embedded controllers and network protocols (see [23] for a survey). Traditional techniques for model checking do not admit an explicit modeling of time, and are thus, unsuitable for analysis of real-time systems whose correctness depends on relative magnitudes of different delays. Consequently, timed automata [7] were introduced as a formal notation to model the behavior of real-time systems. Its definition provides a simple way to annotate state-transition graphs with timing constraints using finitely many real-valued clock variables. Automated analysis of timed automata relies on the construction of a finite quotient of the infinite space of clock valuations. Over the years, the formalism has been extensively studied leading to many results establishing connections to circuits and logic, and much progress has been made in developing verification algorithms, heuristics, and tools. This paper provides a survey of the theory of timed automata, and their role in specification and verification of real-time systems.
ModelingTransition systems. We model discrete systems by state-transition graphs whose transitions are labeled with event symbols. A transition system S is a tuple Q, Q 0 , Σ, → , where Q is a set of states, Q 0 ⊆ Q is a set of initial states, Σ is a set of labels (or events), and →⊆ Q × Σ × Q is a set of transitions. The system starts in an initial state, and if q a → q then the system can change its state from q to q on event a. We write q → q if q a → q for some label a. The state q is reachable from the state q if q → * q . The state q is a reachable state of the system if q is reachable from some initial state.A complex system can be described as a product of interacting transition systems. Letand q 1 a → 1 q 1 and q 2 = q 2 , or (iii) a ∈ Σ 2 \ Σ 1 and q 2 a → 2 q 2 and q 1 = q 1 . Observe that the symbols that belong to the alphabets of both the automata are used for synchronization.