Live Demonstration: A Neural Processor for AI Acceleration

Kim, Hyeji; Chung, Jaehoon; Shin, Kyoung-Seon; Lyuh, Chun‐Gi; Kim, Hyun-Mi; Kim, Chan; Cho, Yong Cheol Peter; Yang, Jung‐Seok; Ham, Je-Seok; Choi, Minseok; Han, Jinho; Kwon, Young–Se

doi:10.1109/iscas51556.2021.9401074

Cited by 2 publications

(1 citation statement)

References 4 publications

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“…Our proposed DFS is evaluated on an AB9 board [13]. The AB9 board is connected to the host PC with 10th Gen Intel CORE i7 through the PCIe interface.…”

Section: Evaluation Environmentmentioning

confidence: 99%

A layer‐wise frequency scaling for a neural processing unit

et al. 2022

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Dynamic voltage frequency scaling (DVFS) has been widely adopted for runtime power management of various processing units. In the case of neural processing units (NPUs), power management of neural network applications is required to adjust the frequency and voltage every layer to consider the power behavior and performance of each layer. Unfortunately, DVFS is inappropriate for layer-wise run-time power management of NPUs due to the long latency of voltage scaling compared with each layer execution time. Because the frequency scaling is fast enough to keep up with each layer, we propose a layerwise dynamic frequency scaling (DFS) technique for an NPU. Our proposed DFS exploits the highest frequency under the power limit of an NPU for each layer. To determine the highest allowable frequency, we build a power model to predict the power consumption of an NPU based on a real measurement on the fabricated NPU. Our evaluation results show that our proposed DFS improves frame per second (FPS) by 33% and saves energy by 14% on average, compared with DVFS.

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“…Our proposed DFS is evaluated on an AB9 board [13]. The AB9 board is connected to the host PC with 10th Gen Intel CORE i7 through the PCIe interface.…”

Section: Evaluation Environmentmentioning

confidence: 99%