Lithography performance of contact holes: II. Simulation of the effects of reticle corner rounding on wafer print performance

Mack, Chris A.; Sauer, Charles A.; Weaver, Suzanne; Chabala, J. M.

doi:10.1117/12.392055

Cited by 6 publications

(7 citation statements)

References 2 publications

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“…Mask corner rounding influence on wafer has been simulated previously, 3 with the results showing that the shape of the printed image on wafer is not changed due to diffraction limitations. However, the aerial image intensity can be affected.…”

Section: Mask Corner Roundingmentioning

confidence: 95%

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Two-dimensional mask effects at the 14 nm logic node

et al. 2013

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At the 14 nm logic node, significant lithographic changes relative to previous technologies are needed to resolve smaller features with increased fragmentation in mask design and increased use of sub-resolution assist features. Extending the application of 193 immersion lithography for further generations requires not only continued reduction of traditional sources of variation but investigation into and quantification of the impact of completely new ones, such as mask twodimensional (2D) variability. To improve the overall lithography model accuracy, two-dimensional (2D) data from the mask is required to complete a mask model with an optimal wafer response. 1 This paper characterizes and assesses the importance of 2D mask effects on thin opaque MoSi on glass (OMOG) masks. Methodologies for characterizing corner rounding in terms of corner rounding radius and contact area are presented. Optical mask 2D measurements and wafer print results are summarized.

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Section: Mask Corner Roundingmentioning

confidence: 95%

“…Measurements of corner rounding have historically been focused on square contacts and defined in terms of contact area 3 and more specifically as the corner rounding radius. 4 Simple geometries may be best defined and controlled using contact area, which describes corner rounding and other area loss effects combined.…”

Section: Measurement and Analysismentioning

confidence: 99%

Two-dimensional mask effects at the 14 nm logic node

et al. 2013

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“…The lithography impact of this corner rounding also depends on the proximity of the corner to other features, in particular to other corners. 3,4 Yenikaya and Sezginer later proposed a rigorous mathematical method to determine the printability of a target layout in 2007. 8 However, it may not be necessary to compute the exact contours as the OPC target, especially for the noncorner straight edges.…”

Section: Contour-based Optical Proximity Correctionmentioning

confidence: 99%

“…Furthermore, the computation time remains in doubt. Instead of a complicated computation involving precise rounding contours, an empirical description proposed for the isolated corners according to Mack's study 3,4 and a tolerance band is used in this work to control the moved simulation sites.…”

Section: Contour-based Optical Proximity Correctionmentioning

confidence: 99%

“…2, 3 Mack et al studied the effect of corner rounding and line-end shortening in optical lithography, and proposed the corner radius of the aerial image in 2000. 4,5 In recent years, there have been many papers discussing corner rounding effects in the lithography with the shrinking k 1 imaging factor. A study carried out by Jones and Byers discussed the theoretical corner rounding analysis and mask writer simulation.…”

Section: Introductionmentioning

confidence: 99%

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Study of the contour-based optical proximity correction methodology

Kang¹

2009

J. Micro/Nanolith. MEMS MOEMS

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As design rule continues to shrink, resolution enhancement techniques ͑RET͒ such as optical proximity correction ͑OPC͒ become more and more complex to enable design printability. As we know, typically integrated circuit ͑IC͒ layouts are simple shapes such as rectangles. However, high spatial frequency components of the mask spectrum that are not captured by the low-pass pupil result in a rounded image. In addition, the diffusion process in the postexposure bake ͑PEB͒ step makes the wafer rounding effects worse. This means that it is difficult to get the wafer image to match the design exactly at corners, even with the most aggressive OPC methodology. Therefore, pre-OPC site placement optimization is necessary to achieve high quality wafer images. In this work, a contour-based OPC methodology is proposed to minimize the time consumption in pre-OPC simulation site placement optimization and OPC job running. Rounded target contours that best describe the real intended wafer result are used as the target during OPC correction. By comparing classical OPC recipe-driven target point placement and contour-based OPC methodology, it is found that contour-based OPC methodology can achieve comparable image quality in a shorter turn around time ͑TAT͒ with fewer engineer resources.

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