Libretto: An Open Cell Timing Characterizer for Open Source VLSI Design

Abstract

We propose an open source cell library characterizer. Recently, free and open-sourced silicon design communities are attracted by hobby designers, academies and industries. These open-sourced silicon designs are supported by free and open sourced EDAs, however, in our knowledge, tool-chain lacks cell library characterizer to use original standard cells into digital circuit design. This paper proposes an open source cell library characterizer which can generate timing models and power models of standard cell library.

Open-source, multi-layer LSI design & fabrication framework for distributed IP development and education

“…Berkeley's SPICE is one of the most famous and traditional open source circuit simulators, and its following projects are also continuously developed, integrating the digital circuit simulations [27]. The timing characterization of the digital circuit elements is required to establish high-level digital design flow, and there is some research to realize the open-source tools [28].…”